From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA92AC433E0 for ; Fri, 19 Jun 2020 13:45:19 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F5D5206F7 for ; Fri, 19 Jun 2020 13:45:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8F5D5206F7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jmHKI-0002s2-5y; Fri, 19 Jun 2020 13:45:02 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jmHKG-0002rx-LW for xen-devel@lists.xenproject.org; Fri, 19 Jun 2020 13:45:00 +0000 X-Inumbo-ID: 117e380c-b233-11ea-bb81-12813bfff9fa Received: from esa5.hc3370-68.iphmx.com (unknown [216.71.155.168]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 117e380c-b233-11ea-bb81-12813bfff9fa; Fri, 19 Jun 2020 13:44:59 +0000 (UTC) Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: KCqsDXjhRe6xidaxQhUBWEa+7/hyWKSHLXgGmWKv2u7PUEIfdUZJxINcBRV6PgS8bmtqfUaJVi fGmahqMyCXLslVSlUpfgFLoTHWM8fPrK1vvMiQ7xisRkL2AQ3Ec3KPuYPsaVu021ixaGYqv/7c bsl/biUGzJeJfcVwMxRL6w6cGsfBHnHST6JR71z56ReYz8wmEn6ks9+yulrh3wbh5lGmB4daGh EB4niZ7Zb68WNHYcFHPgTBXiZIcLSV2pcMyJaeKI2KdSmZARHTW/Rg/sMH4HcrQXP/sDngoX1z 6qM= X-SBRS: 2.7 X-MesageID: 20696736 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.75,255,1589256000"; d="scan'208";a="20696736" Date: Fri, 19 Jun 2020 15:44:52 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: =?utf-8?Q?Micha=C5=82_Leszczy=C5=84ski?= Subject: Re: [PATCH v2 3/7] x86/vmx: add IPT cpu feature Message-ID: <20200619134452.GA735@Air-de-Roger> References: <122238637.9820857.1592523264685.JavaMail.zimbra@cert.pl> <626789888.9820937.1592523621821.JavaMail.zimbra@cert.pl> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <626789888.9820937.1592523621821.JavaMail.zimbra@cert.pl> X-ClientProxiedBy: AMSPEX02CAS02.citrite.net (10.69.22.113) To AMSPEX02CL02.citrite.net (10.69.22.126) X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , "Kang, Luwei" , Jun Nakajima , Wei Liu , Andrew Cooper , Jan Beulich , Tamas K Lengyel , Xen-devel Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" On Fri, Jun 19, 2020 at 01:40:21AM +0200, Michał Leszczyński wrote: > Check if Intel Processor Trace feature is supported by current > processor. Define hvm_ipt_supported function. > > Signed-off-by: Michal Leszczynski > --- We usually keep a shirt list of the changes between versions, so it's easier for the reviewers to know what changed. As an example: https://lore.kernel.org/xen-devel/20200613184132.11880-1-julien@xen.org/ > xen/arch/x86/hvm/vmx/vmcs.c | 4 ++++ > xen/include/asm-x86/cpufeature.h | 1 + > xen/include/asm-x86/hvm/hvm.h | 9 +++++++++ > xen/include/asm-x86/hvm/vmx/vmcs.h | 1 + > xen/include/public/arch-x86/cpufeatureset.h | 1 + > 5 files changed, 16 insertions(+) > > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > index ca94c2bedc..8466ccb912 100644 > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -315,6 +315,10 @@ static int vmx_init_vmcs_config(void) > if ( opt_ept_pml ) > opt |= SECONDARY_EXEC_ENABLE_PML; > > + /* Check whether IPT is supported in VMX operation */ > + hvm_funcs.pt_supported = cpu_has_ipt && > + ( _vmx_misc_cap & VMX_MISC_PT_SUPPORTED ); By the placement of this chunk you are tying IPT support to the secondary exec availability, but I don't think that's required? Ie: You should move the read of misc_cap to the top-level of the function and perform the VMX_MISC_PT_SUPPORTED check there also. Note that space inside parentheses is only required for conditions of 'if', 'for' and those kind of statements, here it's not required, so this should be: hvm_funcs.pt_supported = cpu_has_ipt && (_vmx_misc_cap & VMX_MISC_PT_SUPPORTED); I also think this should look like: if ( !smp_processor_id() ) hvm_funcs.pt_supported = cpu_has_ipt && (_vmx_misc_cap & VMX_MISC_PT_SUPPORTED); else if ( hvm_funcs.pt_supported && !(_vmx_misc_cap & VMX_MISC_PT_SUPPORTED) ) { printk("VMX: IPT capabilities fatally differ between CPU%u and CPU0\n", smp_processor_id()); return -EINVAL; } So that you can detect mismatches between CPUs. Thanks, Roger.