From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 0/4] nVMX: 5-level nested EPT support
Date: Mon, 22 Jun 2020 10:42:08 -0700 [thread overview]
Message-ID: <20200622174208.GF5150@linux.intel.com> (raw)
In-Reply-To: <20200207174244.6590-1-sean.j.christopherson@intel.com>
Ping. These still apply cleanly on master and are required to get unit
tests passing on systems with 5-level paging.
On Fri, Feb 07, 2020 at 09:42:40AM -0800, Sean Christopherson wrote:
> Add support for 5-level nested EPT and clean up the test for
> MSR_IA32_VMX_EPT_VPID_CAP in the process.
>
> Sean Christopherson (4):
> nVMX: Extend EPTP test to allow 5-level EPT
> nVMX: Refactor the EPT/VPID MSR cap check to make it readable
> nVMX: Mark bit 39 of MSR_IA32_VMX_EPT_VPID_CAP as reserved
> nVMX: Extend EPT cap MSR test to allow 5-level EPT
>
> x86/vmx.c | 21 ++++++++++++++++++++-
> x86/vmx.h | 4 +++-
> x86/vmx_tests.c | 12 ++++++++----
> 3 files changed, 31 insertions(+), 6 deletions(-)
>
> --
> 2.24.1
>
next prev parent reply other threads:[~2020-06-22 17:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-07 17:42 [kvm-unit-tests PATCH 0/4] nVMX: 5-level nested EPT support Sean Christopherson
2020-02-07 17:42 ` [kvm-unit-tests PATCH 1/4] nVMX: Extend EPTP test to allow 5-level EPT Sean Christopherson
2020-02-07 17:42 ` [kvm-unit-tests PATCH 2/4] nVMX: Refactor the EPT/VPID MSR cap check to make it readable Sean Christopherson
2020-02-07 17:42 ` [kvm-unit-tests PATCH 3/4] nVMX: Mark bit 39 of MSR_IA32_VMX_EPT_VPID_CAP as reserved Sean Christopherson
2020-02-07 17:42 ` [kvm-unit-tests PATCH 4/4] nVMX: Extend EPT cap MSR test to allow 5-level EPT Sean Christopherson
2020-06-22 17:42 ` Sean Christopherson [this message]
2020-06-22 17:44 ` [kvm-unit-tests PATCH 0/4] nVMX: 5-level nested EPT support Paolo Bonzini
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