From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org, paul@xen.org,
Wei Liu <wl@xen.org>, Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0
Date: Mon, 29 Jun 2020 16:46:32 +0200 [thread overview]
Message-ID: <20200629144632.GI735@Air-de-Roger> (raw)
In-Reply-To: <88a91a26-1ad8-bf85-d55e-4fc29afaf554@suse.com>
On Thu, Jun 18, 2020 at 06:05:21PM +0200, Jan Beulich wrote:
> On 12.06.2020 17:56, Roger Pau Monne wrote:
> > Some video BIOS require a PIT in order to work properly, hence classic
> > PV dom0 gets partial access to the physical PIT as long as it's not in
> > use by Xen.
> >
> > Since PVH dom0 is built on top of HVM support, there's already an
> > emulated PIT implementation available for use. Tweak the emulated PIT
> > code so it injects interrupts directly into the vIO-APIC if the legacy
> > PIC (i8259) is disabled. Make sure the GSI used matches the ISA IRQ 0
> > in the likely case there's an interrupt overwrite in the MADT ACPI
>
> Same nit again as for the earlier patch (also applicable to a code
> comment below).
>
> > @@ -578,7 +579,7 @@ int arch_domain_create(struct domain *d,
> >
> > emflags = config->arch.emulation_flags;
> >
> > - if ( is_hardware_domain(d) && is_pv_domain(d) )
> > + if ( is_hardware_domain(d) )
> > emflags |= XEN_X86_EMU_PIT;
>
> Wouldn't this better go into create_dom0(), where all the other
> flags get set? Or otherwise all of that be moved here (to cover
> the late-hwdom case)?
I've just moved all setting of the emulation_flags to
arch_domain_create so it's done at the same place for PV and PVH.
> > --- a/xen/arch/x86/hvm/vioapic.c
> > +++ b/xen/arch/x86/hvm/vioapic.c
> > @@ -268,7 +268,14 @@ static void vioapic_write_redirent(
> >
> > spin_unlock(&d->arch.hvm.irq_lock);
> >
> > - if ( is_hardware_domain(d) && unmasked )
> > + if ( is_hardware_domain(d) && unmasked &&
> > + /*
> > + * A PVH dom0 can have an emulated PIT that should respect any
> > + * interrupt overwrites found in the ACPI MADT table, so we need to
> > + * check to which GSI the ISA IRQ 0 is mapped in order to prevent
> > + * identity mapping it.
> > + */
> > + (!has_vpit(d) || gsi != hvm_isa_irq_to_gsi(d, 0)) )
>
> Isn't has_vpit() true now for Dom0, and hence that part of the
> condition is kind of pointless?
Well, yes, but I think we should strive for the code to be prepared to
deal with both vPIT enabled or disabled, and hence shouldn't make
assumptions.
> And shouldn't Dom0 never have seen
> physical IRQ 0 in the first place (we don't allow PV Dom0 to use
> that IRQ either, after all)?
Yes, that will fail in map_domain_pirq, so a PVH dom0 won't be able to
bind IRQ 0 anyway.
Roger.
prev parent reply other threads:[~2020-06-29 14:46 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 15:56 [PATCH for-4.14 0/8] x86/vpt: fixes for vpt and enable vPIT for PVH dom0 Roger Pau Monne
2020-06-12 15:56 ` [PATCH for-4.14 1/8] x86/hvm: fix vIO-APIC build without IRQ0_SPECIAL_ROUTING Roger Pau Monne
2020-06-15 10:00 ` Paul Durrant
2020-06-15 11:44 ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 2/8] x86/hvm: don't force vCPU 0 for IRQ 0 when using fixed destination mode Roger Pau Monne
2020-06-18 13:43 ` Jan Beulich
2020-06-18 13:48 ` Roger Pau Monné
2020-06-18 14:08 ` Jan Beulich
2020-06-18 14:18 ` Roger Pau Monné
2020-06-18 14:29 ` Jan Beulich
2020-06-18 14:49 ` Roger Pau Monné
2020-06-18 15:16 ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC Roger Pau Monne
2020-06-18 14:26 ` Jan Beulich
2020-06-18 14:55 ` Roger Pau Monné
2020-06-18 15:20 ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 4/8] x86/vpt: only try to resume timers belonging to enabled devices Roger Pau Monne
2020-06-18 14:37 ` Jan Beulich
2020-06-18 14:56 ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 5/8] x86/hvm: only translate ISA interrupts to GSIs in virtual timers Roger Pau Monne
2020-06-18 14:47 ` Jan Beulich
2020-06-18 15:03 ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 6/8] x86/vpt: fix injection to remote vCPU Roger Pau Monne
2020-06-18 15:12 ` Jan Beulich
2020-06-18 17:14 ` Roger Pau Monné
2020-06-19 12:37 ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 7/8] x86/hvm: add hardware domain support to hvm_isa_irq_to_gsi Roger Pau Monne
2020-06-18 15:37 ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0 Roger Pau Monne
2020-06-15 15:33 ` Andrew Cooper
2020-06-15 15:47 ` Roger Pau Monné
2020-06-18 16:05 ` Jan Beulich
2020-06-29 14:46 ` Roger Pau Monné [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200629144632.GI735@Air-de-Roger \
--to=roger.pau@citrix.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=paul@xen.org \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.