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[35.199.190.124]) by smtp.gmail.com with ESMTPSA id d190sm22259042pfd.199.2020.07.07.12.12.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jul 2020 12:12:28 -0700 (PDT) Date: Tue, 7 Jul 2020 19:12:24 +0000 From: Satya Tangirala To: Steev Klimaszewski , Thara Gopinath Cc: Eric Biggers , linux-scsi@vger.kernel.org Subject: Re: [PATCH v5 5/5] scsi: ufs-qcom: add Inline Crypto Engine support Message-ID: <20200707191224.GA2203002@google.com> References: <20200621173713.132879-1-ebiggers@kernel.org> <20200621173713.132879-6-ebiggers@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200621173713.132879-6-ebiggers@kernel.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org On Sun, Jun 21, 2020 at 10:37:13AM -0700, Eric Biggers wrote: > From: Eric Biggers > > Add support for Qualcomm Inline Crypto Engine (ICE) to ufs-qcom. > > The standards-compliant parts, such as querying the crypto capabilities > and enabling crypto for individual UFS requests, are already handled by > ufshcd-crypto.c, which itself is wired into the blk-crypto framework. > However, ICE requires vendor-specific init, enable, and resume logic, > and it requires that keys be programmed and evicted by vendor-specific > SMC calls. Make the ufs-qcom driver handle these details. > > I tested this on Dragonboard 845c, which is a publicly available > development board that uses the Snapdragon 845 SoC and runs the upstream > Linux kernel. This is the same SoC used in the Pixel 3 and Pixel 3 XL > phones. This testing included (among other things) verifying that the > expected ciphertext was produced, both manually using ext4 encryption > and automatically using a block layer self-test I've written. > > I've also tested that this driver works nearly as-is on the Snapdragon > 765 and Snapdragon 865 SoCs. And others have tested it on Snapdragon > 850, Snapdragon 855, and Snapdragon 865 (see the Tested-by tags). > > This is based very loosely on the vendor-provided driver in the kernel > source code for the Pixel 3, but I've greatly simplified it. Also, for > now I've only included support for major version 3 of ICE, since that's > all I have the hardware to test with the mainline kernel. Plus it > appears that version 3 is easier to use than older versions of ICE. > > For now, only allow using AES-256-XTS. The hardware also declares > support for AES-128-XTS, AES-{128,256}-ECB, and AES-{128,256}-CBC > (BitLocker variant). But none of these others are really useful, and > they'd need to be individually tested to be sure they worked properly. > > This commit also changes the name of the loadable module from "ufs-qcom" > to "ufs_qcom", as this is necessary to compile it from multiple source > files (unless we were to rename ufs-qcom.c). > > Tested-by: Steev Klimaszewski # Lenovo Yoga C630 > Tested-by: Thara Gopinath # db845c, sm8150-mtp, sm8250-mtp Hi Steev and Thara, I've sent out the patches that add inline encryption support to UFS (that these patches build upon) at https://lore.kernel.org/linux-scsi/20200706200414.2027450-1-satyat@google.com/ Can I add "Tested-by"'s from both of you to that patch series? Thanks! > Signed-off-by: Eric Biggers > --- > MAINTAINERS | 2 +- > drivers/scsi/ufs/Kconfig | 1 + > drivers/scsi/ufs/Makefile | 4 +- > drivers/scsi/ufs/ufs-qcom-ice.c | 245 ++++++++++++++++++++++++++++++++ > drivers/scsi/ufs/ufs-qcom.c | 12 +- > drivers/scsi/ufs/ufs-qcom.h | 27 ++++ > 6 files changed, 288 insertions(+), 3 deletions(-) > create mode 100644 drivers/scsi/ufs/ufs-qcom-ice.c > > -- > 2.27.0 >