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From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
Date: Wed, 8 Jul 2020 13:11:05 -0700	[thread overview]
Message-ID: <20200708201105.GB1885@intel.com> (raw)
In-Reply-To: <20200701221052.8946-2-manasi.d.navare@intel.com>

Pushed to dinq, thanks for all reviews

Manasi

On Wed, Jul 01, 2020 at 03:10:52PM -0700, Manasi Navare wrote:
> Based on the platform, Bspec expects us to wait or poll with
> timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> after enabling DDI_BUF_CTL.
> 
> v2:
> * Based on platform, fixed delay or poll (Ville)
> * Use a helper to do this (Imre, Ville)
> v3:
> * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> v4:
> * Use the timeout for GLK (Ville)
> v5:
> * Add bspec quote, change timeout to 500us (Ville)
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a7de1344db69..4f89ad90ab07 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1195,6 +1195,21 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
>  			port_name(port));
>  }
>  
> +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> +				      enum port port)
> +{
> +	/* Wait > 518 usecs for DDI_BUF_CTL to be non idle */
> +	if (INTEL_GEN(dev_priv) < 10 && !IS_GEMINILAKE(dev_priv)) {
> +		usleep_range(518, 1000);
> +		return;
> +	}
> +
> +	if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> +			  DDI_BUF_IS_IDLE), 500))
> +		drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> +			port_name(port));
> +}
> +
>  static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
>  {
>  	switch (pll->info->id) {
> @@ -4019,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
>  	intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
>  	intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
>  
> -	udelay(600);
> +	intel_wait_ddi_buf_active(dev_priv, port);
>  }
>  
>  static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> -- 
> 2.19.1
> 
_______________________________________________
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  reply	other threads:[~2020-07-08 20:09 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-01 22:10 [Intel-gfx] [PATCH v5 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
2020-07-01 22:10 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
2020-07-08 20:11   ` Manasi Navare [this message]
2020-07-01 22:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Patchwork
2020-07-01 22:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-02  2:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-07-06 23:46   ` Manasi Navare
2020-07-07 11:48 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-07-08 20:10 ` [Intel-gfx] [PATCH v5 1/2] " Manasi Navare

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