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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvkdv-0006AR-EE; Wed, 15 Jul 2020 16:52:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvkds-00069X-Tx for linux-arm-kernel@lists.infradead.org; Wed, 15 Jul 2020 16:52:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BD72E31B; Wed, 15 Jul 2020 09:52:22 -0700 (PDT) Received: from arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A31913F718; Wed, 15 Jul 2020 09:52:21 -0700 (PDT) Date: Wed, 15 Jul 2020 17:52:19 +0100 From: Dave Martin To: Mark Brown Subject: Re: [PATCH v3 6/8] arm64/sve: Implement a helper to load SVE registers from FPSIMD state Message-ID: <20200715165219.GE30452@arm.com> References: <20200629133556.39825-1-broonie@kernel.org> <20200629133556.39825-7-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200629133556.39825-7-broonie@kernel.org> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200715_125225_336598_FD72C363 X-CRM114-Status: GOOD ( 20.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , Catalin Marinas , zhang.lei@jp.fujitsu.com, Julien Grall , Will Deacon , linux-arm-kernel@lists.infradead.org, Daniel Kiss Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 29, 2020 at 02:35:54PM +0100, Mark Brown wrote: > From: Julien Grall > > In a follow-up patch, we may save the FPSIMD rather than the full SVE > state when the state has to be zeroed on return to userspace (e.g > during a syscall). > > Introduce an helper to load SVE vectors from FPSIMD state and zero the rest > of SVE registers. > > Signed-off-by: Julien Grall > Reviewed-by: Dave Martin > Signed-off-by: Mark Brown > --- > arch/arm64/include/asm/fpsimd.h | 2 ++ > arch/arm64/kernel/entry-fpsimd.S | 17 +++++++++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h > index 958f642e930d..bec5f14b622a 100644 > --- a/arch/arm64/include/asm/fpsimd.h > +++ b/arch/arm64/include/asm/fpsimd.h > @@ -70,6 +70,8 @@ extern void sve_save_state(void *state, u32 *pfpsr); > extern void sve_load_state(void const *state, u32 const *pfpsr, > unsigned long vq_minus_1); > extern void sve_flush_live(void); > +extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state, > + unsigned long vq_minus_1); > extern unsigned int sve_get_vl(void); > > struct arm64_cpu_capabilities; > diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S > index fdf7a5a35c63..5b1a9adfb00b 100644 > --- a/arch/arm64/kernel/entry-fpsimd.S > +++ b/arch/arm64/kernel/entry-fpsimd.S > @@ -48,6 +48,23 @@ SYM_FUNC_START(sve_get_vl) > ret > SYM_FUNC_END(sve_get_vl) > > +/* > + * Load SVE state from FPSIMD state. > + * > + * x0 = pointer to struct fpsimd_state > + * x1 = VQ - 1 > + * > + * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD > + * and the rest zeroed. All the other SVE registers will be zeroed. > + */ > +SYM_FUNC_START(sve_load_from_fpsimd_state) > + sve_load_vq x1, x2, x3 > + fpsimd_restore x0, 8 > + _for n, 0, 15, _sve_pfalse \n > + _sve_wrffr 0 FWIW, trivial nit that I guess I didn't spot previously: tab before 0 here? Mind you, the spacing is already a bit off in this file. Cheers ---Dave _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel