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From: Mauro Rossi <issor.oruam@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, Mauro Rossi <issor.oruam@gmail.com>,
	harry.wentland@amd.com
Subject: [PATCH v3 26/27] drm/amdgpu: enable DC support for SI parts (v2)
Date: Thu, 16 Jul 2020 23:22:50 +0200	[thread overview]
Message-ID: <20200716212251.1539094-27-issor.oruam@gmail.com> (raw)
In-Reply-To: <20200716212251.1539094-1-issor.oruam@gmail.com>

[Why]
amdgpu_device.c requires changes for SI chipsets support
si.c require changes for Display Manager IP block enabling

[How]
amdgpu_device.c: add SI families in amdgpu_device_asic_has_dc_support()
si.c: changes in si_set_ip_blocks() for Display Manager IP blocks enablement

(v1) NOTE: As per Kaveri and older amdgpu.dc=1 kernel cmdline is required

(v2) fix for bc011f9350 ("drm/amdgpu: Change SI/CI gfx/sdma/smu init sequence")
     remove CHIP_HAINAN support since it does not have physical DCE6 module

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 ++++++
 drivers/gpu/drm/amd/amdgpu/si.c            | 10 ++++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index aa5b54e5a1d7..cd5efa6c1c18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2775,6 +2775,12 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
 {
 	switch (asic_type) {
 #if defined(CONFIG_DRM_AMD_DC)
+#if defined(CONFIG_DRM_AMD_DC_SI)
+	case CHIP_TAHITI:
+	case CHIP_PITCAIRN:
+	case CHIP_VERDE:
+	case CHIP_OLAND:
+#endif
 	case CHIP_BONAIRE:
 	case CHIP_KAVERI:
 	case CHIP_KABINI:
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 1b449291f068..5a112c7a35ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -52,6 +52,8 @@
 #include "bif/bif_3_0_d.h"
 #include "bif/bif_3_0_sh_mask.h"
 
+#include "amdgpu_dm.h"
+
 static const u32 tahiti_golden_registers[] =
 {
 	mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
@@ -2546,6 +2548,10 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
 		if (adev->enable_virtual_display)
 			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC) && defined(CONFIG_DRM_AMD_DC_SI)
+		else if (amdgpu_device_has_dc_support(adev))
+			amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#endif
 		else
 			amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
 		amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
@@ -2560,6 +2566,10 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
 		if (adev->enable_virtual_display)
 			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC) && defined(CONFIG_DRM_AMD_DC_SI)
+		else if (amdgpu_device_has_dc_support(adev))
+			amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#endif
 		else
 			amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block);
 		amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
-- 
2.25.1

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  parent reply	other threads:[~2020-07-16 21:23 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 21:22 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 01/27] drm/amdgpu: add some required DCE6 registers (v6) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 02/27] drm/amd/display: add asics info for SI parts Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 03/27] drm/amd/display: dc/dce: add initial DCE6 support (v9b) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 04/27] drm/amd/display: dc/core: add SI/DCE6 support (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 05/27] drm/amd/display: dc/bios: add support for DCE6 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 06/27] drm/amd/display: dc/gpio: add support for DCE6 (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 07/27] drm/amd/display: dc/irq: add support for DCE6 (v4) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 08/27] drm/amd/display: amdgpu_dm: add SI support (v4) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 09/27] drm/amd/display: dc/clk_mgr: add support for SI parts (v2) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 10/27] drm/amd/display: dc/dce60: set max_cursor_size to 64 Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 11/27] drm/amd/display: dce_audio: add DCE6 specific macros, functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 12/27] drm/amd/display: dce_dmcu: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 13/27] drm/amd/display: dce_hwseq: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 14/27] drm/amd/display: dce_ipp: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 15/27] drm/amd/display: dce_link_encoder: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 16/27] drm/amd/display: dce_mem_input: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 17/27] drm/amd/display: dce_opp: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 18/27] drm/amd/display: dce_transform: " Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 19/27] drm/amdgpu: add some required DCE6 registers (v7) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 20/27] drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 21/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 22/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific .cursor_lock Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 23/27] drm/amd/display: dce60_timing_generator: add DCE6 specific functions Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 24/27] drm/amd/display: dc/dce60: use DCE6 headers (v6) Mauro Rossi
2020-07-16 21:22 ` [PATCH v3 25/27] drm/amd/display: create plane rotation property for Bonaire and later Mauro Rossi
2020-07-16 21:22 ` Mauro Rossi [this message]
2020-07-16 21:22 ` [PATCH v3 27/27] drm/amd/display: enable SI support in the Kconfig (v2) Mauro Rossi
2020-07-20  9:00 ` Christian König
2020-07-20  9:59   ` Re: Mauro Rossi
2020-07-22  2:51     ` Re: Alex Deucher
2020-07-22  7:56       ` Re: Mauro Rossi
2020-07-24 18:31         ` Re: Alex Deucher
2020-07-26 15:31           ` Re: Mauro Rossi
2020-07-27 18:31             ` Re: Alex Deucher
2020-07-27 19:46               ` Re: Mauro Rossi
2020-07-27 19:54                 ` Re: Alex Deucher

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