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[209.51.188.17]) by mx.google.com with ESMTPS id g5si1418135vsc.424.2020.07.28.08.13.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 28 Jul 2020 08:13:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@redhat.com header.s=mimecast20190719 header.b=Le0Tmudk; spf=pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:46524 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k0RHz-0003pO-Dw for alex.bennee@linaro.org; Tue, 28 Jul 2020 11:13:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41736) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k0REy-0007PQ-J6 for qemu-devel@nongnu.org; Tue, 28 Jul 2020 11:10:04 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:34998 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1k0REw-0007hN-Ke for qemu-devel@nongnu.org; Tue, 28 Jul 2020 11:10:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1595949001; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=5ok4OsHYVJSOwQoAqcEDnIMx1zlXpvooFS/7t7HADcE=; b=Le0TmudkIFa/hLLzi/Va2CuyAg/ifsqoPv6PXjUrr6KVJ+YTsh9si1+oQyotDzorbzViS2 tfFCpwL2/+eY8w44YW/maMU+2rsx6KnUPFOHGDYm4i6Tok3JAcqVeXwf/n8UmyKxmifLQI vYIOUeiT1XlvcjQAnlCNP4rEJ4+iEpc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-288-uDEH2QnsM0qE21qEZpSbTw-1; Tue, 28 Jul 2020 11:08:26 -0400 X-MC-Unique: uDEH2QnsM0qE21qEZpSbTw-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 692E18C5069; Tue, 28 Jul 2020 15:08:24 +0000 (UTC) Received: from laptop.redhat.com (ovpn-112-203.ams2.redhat.com [10.36.112.203]) by smtp.corp.redhat.com (Postfix) with ESMTP id 94D555C1BD; Tue, 28 Jul 2020 15:08:19 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, peterx@redhat.com Subject: [PATCH for-5.2 v4 00/11] SMMUv3.2 Range-based TLB Invalidation Support Date: Tue, 28 Jul 2020 17:08:04 +0200 Message-Id: <20200728150815.11446-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=207.211.31.81; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/28 10:31:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jean-philippe@linaro.org, robh@kernel.org, robin.murphy@arm.com, mst@redhat.com, zhangfei.gao@foxmail.com, shameerali.kolothum.thodi@huawei.com, will@kernel.org Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: /ZvShDkeBk0g SMMU3.2 brings the support of range-based TLB invalidation and level hint. When this feature is supported, the SMMUv3 driver is allowed to send TLB invalidations for a range of IOVAs instead of using page based invalidation. Implementing this feature in the virtual SMMUv3 device is mandated for DPDK on guest use case: DPDK uses hugepage buffers and guest sends invalidations for blocks. Without this feature, a guest invalidation of a block of 1GB for instance translates into a storm of page invalidations. Each of them is trapped by the VMM and cascaded downto the physical IOMMU. This completely stalls the execution. This integration issue was initially reported in [1]. Now SMMUv3.2 specifies additional parameters to NH_VA and NH_VAA stage 1 invalidation commands so we can support those extensions. Supporting block mappings in the IOTLB look sensible in terms of TLB entry consumption. However looking at virtio/vhost device usage, without block mapping and without range invalidation (< 5.7 kernels it may be less performant. However for recent guest kernels supporting range invalidations [2], the performance should be similar. Best Regards Eric This series can be found at: https://github.com/eauger/qemu.git branch: v5.1.0-rc1-smmuv3-ril-v4 References: [1] [RFC v2 4/4] iommu/arm-smmu-v3: add CMD_TLBI_NH_VA_AM command for iova range invalidation (https://lists.linuxfoundation.org/pipermail/iommu/2017-August/023679.html [2] 5.7+ kernels featuring 6a481a95d4c1 iommu/arm-smmu-v3: Add SMMUv3.2 range invalidation support History: v3 -> v4: - use tg in hash function and directly compare key fields in the equal function - don't claim 3.2 as we don't have BBML support yet - fixed a bunch of indent issues v2 -> v3: - restore the Jenkins hash function and keep the key as a struct - simplify the logic in smmu_hash_remove_by_asid_iova - added HAD support - expose AIDR (advertise v3.2 support) and fix IIDR offset v1 -> v2: - added "hw/arm/smmu: Introduce smmu_get_iotlb_key()" - removed "[PATCH 5/9] hw/arm/smmuv3: Store the starting level in SMMUTransTableInfo" - Collected Peter's R-b - In this version the key still features TG/LVL. - More details in individual history logs Eric Auger (11): hw/arm/smmu-common: Factorize some code in smmu_ptw_64() hw/arm/smmu-common: Add IOTLB helpers hw/arm/smmu: Introduce smmu_get_iotlb_key() hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value hw/arm/smmu-common: Manage IOTLB block entries hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper hw/arm/smmuv3: Get prepared for range invalidation hw/arm/smmuv3: Fix IIDR offset hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation hw/arm/smmu-internal.h | 8 ++ hw/arm/smmuv3-internal.h | 10 +- include/hw/arm/smmu-common.h | 19 +++- include/hw/arm/smmuv3.h | 1 + hw/arm/smmu-common.c | 214 ++++++++++++++++++++++++----------- hw/arm/smmuv3.c | 142 +++++++++++------------ hw/arm/trace-events | 12 +- 7 files changed, 258 insertions(+), 148 deletions(-) -- 2.21.3