From: Kyle Meyer <kyle.meyer@hpe.com>
To: unlisted-recipients:; (no To-header on input)
Cc: russ.anderson@hpe.com, steve.wahl@hpe.com, kyle.meyer@hpe.com,
tony.luck@intel.com, bp@alien8.de, linux-edac@vger.kernel.org
Subject: [PATCH] x86/MCE: Set the MCE's status and misc members
Date: Fri, 7 Aug 2020 09:27:50 -0500 [thread overview]
Message-ID: <20200807142750.270548-1-kyle.meyer@hpe.com> (raw)
The MCE's status and misc members are initialized to zero
within mce_setup. Set the MCE's status and misc members to the
corresponding values passed in by the mem_err argument. This provides
support for the RAS: Corrected Errors Collector (CEC) which uses the
MCE.
Signed-off-by: Kyle Meyer <kyle.meyer@hpe.com>
---
arch/x86/include/asm/mce.h | 6 ++++--
arch/x86/kernel/cpu/mce/apei.c | 8 ++++++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index cf503824529c..2346d900a232 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -79,8 +79,10 @@
#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
/* MCi_MISC register defines */
-#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f)
-#define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7)
+#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f)
+#define MCI_MISC_ADDR_LSB_SET(x) ((x) & 0x3f)
+#define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7)
+#define MCI_MISC_ADDR_MODE_SET(x) (((x) & 7) << 6)
#define MCI_MISC_ADDR_SEGOFF 0 /* segment offset */
#define MCI_MISC_ADDR_LINEAR 1 /* linear address */
#define MCI_MISC_ADDR_PHYS 2 /* physical address */
diff --git a/arch/x86/kernel/cpu/mce/apei.c b/arch/x86/kernel/cpu/mce/apei.c
index af8d37962586..efdfb55b934a 100644
--- a/arch/x86/kernel/cpu/mce/apei.c
+++ b/arch/x86/kernel/cpu/mce/apei.c
@@ -38,6 +38,14 @@ void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err)
/* Fake a memory read error with unknown channel */
m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | 0x9f;
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ||
+ boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {
+ m.status |= MCI_STATUS_MISCV;
+ m.misc |= MCI_MISC_ADDR_LSB_SET(ffs(
+ mem_err->physical_addr_mask) - 1) |
+ MCI_MISC_ADDR_MODE_SET(MCI_MISC_ADDR_PHYS);
+ }
+
if (severity >= GHES_SEV_RECOVERABLE)
m.status |= MCI_STATUS_UC;
--
2.26.2
next reply other threads:[~2020-08-07 14:29 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-07 14:27 Kyle Meyer [this message]
2020-08-07 14:41 ` [PATCH] x86/MCE: Set the MCE's status and misc members Borislav Petkov
2020-08-07 15:05 ` Steve Wahl
2020-08-07 16:33 ` Luck, Tony
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200807142750.270548-1-kyle.meyer@hpe.com \
--to=kyle.meyer@hpe.com \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=russ.anderson@hpe.com \
--cc=steve.wahl@hpe.com \
--cc=tony.luck@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.