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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id x17sm670096ljm.0.2020.08.26.11.07.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Aug 2020 11:07:16 -0700 (PDT) Date: Wed, 26 Aug 2020 20:07:15 +0200 From: "Edgar E. Iglesias" To: Richard Henderson Subject: Re: [PATCH 00/77] target/microblaze improvements Message-ID: <20200826180715.GI2954729@toto> References: <20200825205950.730499-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200825205950.730499-1-richard.henderson@linaro.org> Received-SPF: pass client-ip=2a00:1450:4864:20::243; envelope-from=edgar.iglesias@gmail.com; helo=mail-lj1-x243.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: 10 X-Spam_score: 1.0 X-Spam_bar: + X-Spam_report: (1.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FSL_HELO_FAKE=3.066, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, Aug 25, 2020 at 01:58:33PM -0700, Richard Henderson wrote: > Well, this is larger than I expected. > > I started off thinking conversion to decodetree would be quick, > after I reviewed the mttcg patches last week. Then I realized > that this could also use conversion to the generic translation loop. > Then I realized that there were a number of bugs, and some > inefficiencies, that could be fixed by using tcg exception unwind > properly. > > Hopefully most of these are small and easy to understand. > > I begin by adding enough stuff to test/tcg to make use of a > self-built musl cross-environment. I'll note that linuxtest > does not pass before or after this patch set -- I think that > linux-user/microblaze/signal.c needs work -- but that the > other tests do work. > > I also have an old copy of a microblaze system test image, > which I think used to be hosted on our wiki. After basic kernel > boot, it contains a "selftest" script which runs a bunch of > user-land isa tests. That still works fine too. > > HOWEVER: That's not nearly complete. There are cpu config options > that aren't default and I don't know how to change or test. > > In addition, the manual is really not clear on what's supposed to > happen under various edge conditions, especially with MSR[EE] unset. > E.g. unaligned access: Does the insn get nop-ed out? Do the low > bits of the address get ignored? Right now (before and after) the > access simply happens unaligned, which doesn't seem correct. > I assume the reason for having this configure option is to reduce > the size of the FPGA so that the unaligned access handling hw > simply isn't present. Yes, I verified with the RTL designers and this particular case will result in the core issuing the load/store with the lower address bits ignored. Cheers, Edgar