From: Eddie James <eajames@linux.ibm.com>
To: openbmc@lists.ozlabs.org
Cc: joel@jms.id.au, Eddie James <eajames@linux.ibm.com>
Subject: [PATCH u-boot v2019.04-aspeed-openbmc 1/5] ARM: Aspeed: AST2600: Support booting from eMMC
Date: Mon, 31 Aug 2020 14:01:26 -0500 [thread overview]
Message-ID: <20200831190130.47060-2-eajames@linux.ibm.com> (raw)
In-Reply-To: <20200831190130.47060-1-eajames@linux.ibm.com>
Fix a number of things in the platform code for the AST2600 to
support booting the SPL from eMMC and then loading U-Boot from
eMMC.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
arch/arm/include/asm/arch-aspeed/boot0.h | 2 +-
arch/arm/mach-aspeed/ast2600/board_common.c | 72 +++++++++++++++++++++
arch/arm/mach-aspeed/ast2600/spl.c | 9 +--
include/configs/aspeed-common.h | 3 +
4 files changed, 78 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/arch-aspeed/boot0.h b/arch/arm/include/asm/arch-aspeed/boot0.h
index ecd1e927c7..7fd5208773 100644
--- a/arch/arm/include/asm/arch-aspeed/boot0.h
+++ b/arch/arm/include/asm/arch-aspeed/boot0.h
@@ -13,7 +13,7 @@ _start:
#ifdef CONFIG_SPL_BUILD
.word 0x0 /* Key location */
.word 0x0 /* start address of image */
- .word 0X0 /* image size */
+ .word 0Xfc00 /* image size 63KB */
.word 0x0 /* signature address */
.word 0x0 /* header revision ID low */
.word 0x0 /* header revision ID high */
diff --git a/arch/arm/mach-aspeed/ast2600/board_common.c b/arch/arm/mach-aspeed/ast2600/board_common.c
index 449c7d0a23..a6ca8d33f8 100644
--- a/arch/arm/mach-aspeed/ast2600/board_common.c
+++ b/arch/arm/mach-aspeed/ast2600/board_common.c
@@ -8,6 +8,7 @@
#include <timer.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
+#include <linux/bitops.h>
#include <linux/err.h>
#include <dm/uclass.h>
@@ -110,3 +111,74 @@ int arch_early_init_r(void)
return 0;
}
+union ast2600_pll_reg {
+ unsigned int w;
+ struct {
+ unsigned int m : 13; /* bit[12:0] */
+ unsigned int n : 6; /* bit[18:13] */
+ unsigned int p : 4; /* bit[22:19] */
+ unsigned int off : 1; /* bit[23] */
+ unsigned int bypass : 1; /* bit[24] */
+ unsigned int reset : 1; /* bit[25] */
+ unsigned int reserved : 6; /* bit[31:26] */
+ } b;
+};
+
+void aspeed_mmc_init(void)
+{
+ u32 reset_bit;
+ u32 clkstop_bit;
+ u32 clkin = 25000000;
+ u32 pll_reg = 0;
+ u32 enableclk_bit;
+ u32 rate = 0;
+ u32 div = 0;
+ u32 i = 0;
+ u32 mult;
+ u32 clk_sel = readl(0x1e6e2300);
+
+ /* check whether boot from eMMC is enabled */
+ if ((readl(0x1e6e2500) & 0x4) == 0)
+ return;
+
+ /* disable eMMC boot controller engine */
+ *(volatile int *)0x1e6f500C &= ~0x90000000;
+ /* set pinctrl for eMMC */
+ *(volatile int *)0x1e6e2400 |= 0xff000000;
+
+ /* clock setting for eMMC */
+ enableclk_bit = BIT(15);
+
+ reset_bit = BIT(16);
+ clkstop_bit = BIT(27);
+ writel(reset_bit, 0x1e6e2040);
+ udelay(100);
+ writel(clkstop_bit, 0x1e6e2084);
+ mdelay(10);
+ writel(reset_bit, 0x1e6e2044);
+
+ pll_reg = readl(0x1e6e2220);
+ if (pll_reg & BIT(24)) {
+ /* Pass through mode */
+ mult = div = 1;
+ } else {
+ /* F = 25Mhz * [(M + 2) / (n + 1)] / (p + 1) */
+ union ast2600_pll_reg reg;
+ reg.w = pll_reg;
+ mult = (reg.b.m + 1) / (reg.b.n + 1);
+ div = (reg.b.p + 1);
+ }
+ rate = ((clkin * mult)/div);
+
+ for(i = 0; i < 8; i++) {
+ div = (i + 1) * 2;
+ if ((rate / div) <= 200000000)
+ break;
+ }
+
+ clk_sel &= ~(0x7 << 12);
+ clk_sel |= (i << 12) | BIT(11);
+ writel(clk_sel, 0x1e6e2300);
+
+ setbits_le32(0x1e6e2300, enableclk_bit);
+}
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c
index 27796b7385..1a248724ee 100644
--- a/arch/arm/mach-aspeed/ast2600/spl.c
+++ b/arch/arm/mach-aspeed/ast2600/spl.c
@@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define AST_BOOTMODE_UART 2
u32 aspeed_bootmode(void);
+void aspeed_mmc_init(void);
void board_init_f(ulong dummy)
{
@@ -26,6 +27,7 @@ void board_init_f(ulong dummy)
timer_init();
preloader_console_init();
dram_init();
+ aspeed_mmc_init();
#endif
}
@@ -68,13 +70,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
}
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
-u32 spl_boot_mode(const u32 boot_device)
-{
- return MMCSD_MODE_RAW;
-}
-#endif
-
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index cdbffc97a2..7901bc2aff 100644
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -11,6 +11,8 @@
#include <asm/arch/platform.h>
+#define CONFIG_SUPPORT_EMMC_BOOT
+
#define CONFIG_BOOTFILE "all.bin"
#define CONFIG_GATEWAYIP 192.168.0.1
@@ -40,6 +42,7 @@
#define CONFIG_SYS_BOOTMAPSZ (256 * 1024 * 1024)
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
+#define CONFIG_SYS_MONITOR_LEN 0xD0000
/*
* BOOTP options
--
2.26.2
next prev parent reply other threads:[~2020-08-31 19:02 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-31 19:01 [PATCH u-boot v2019.04-aspeed-openbmc 0/5] AST2600: Boot from eMMC Eddie James
2020-08-31 19:01 ` Eddie James [this message]
2020-08-31 19:01 ` [PATCH u-boot v2019.04-aspeed-openbmc 2/5] spl: mmc: Switch partition error to debug Eddie James
2020-08-31 19:01 ` [PATCH u-boot v2019.04-aspeed-openbmc 3/5] mmc: Add support for devicetree parameters for Aspeed controller Eddie James
2020-08-31 23:17 ` Joel Stanley
2020-08-31 19:01 ` [PATCH u-boot v2019.04-aspeed-openbmc 4/5] ARM: dts: Aspeed: Tacoma and Rainier: Add eMMC nodes and parameters Eddie James
2020-08-31 23:18 ` Joel Stanley
2020-08-31 19:01 ` [PATCH u-boot v2019.04-aspeed-openbmc 5/5] configs: AST2600 Openbmc: Update config for eMMC boot Eddie James
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