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Mon, 31 Aug 2020 22:06:21 -0700 (PDT) Date: Tue, 1 Sep 2020 00:06:18 -0500 From: Bjorn Andersson To: Rob Clark Cc: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan , Will Deacon , freedreno@lists.freedesktop.org, Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Joerg Roedel , linux-arm-kernel@lists.infradead.org, Jordan Crouse , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Eric Anholt , Ben Dooks , Emil Velikov , AngeloGioacchino Del Regno , Jonathan Marek , Sharat Masetty , Akhil P Oommen , Brian Masney , Wambui Karuga , Shawn Guo , open list Subject: Re: [PATCH 12/19] drm/msm: Drop context arg to gpu->submit() Message-ID: <20200901050618.GT3715@yoga> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> <20200814024114.1177553-13-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200814024114.1177553-13-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Now that we can get the ctx from the submitqueue, the extra arg is > redundant. > Reviewed-by: Bjorn Andersson > Signed-off-by: Jordan Crouse > [split out of previous patch to reduce churny noise] > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++------- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-- > drivers/gpu/drm/msm/msm_gem_submit.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.c | 9 ++++----- > drivers/gpu/drm/msm/msm_gpu.h | 6 ++---- > 7 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 9e63a190642c..eff2439ea57b 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -43,8 +43,7 @@ static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) > gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); > } > > -static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct msm_drm_private *priv = gpu->dev->dev_private; > struct msm_ringbuffer *ring = submit->ring; > @@ -57,7 +56,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > @@ -103,8 +102,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > msm_gpu_retire(gpu); > } > > -static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); > @@ -114,7 +112,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > > if (IS_ENABLED(CONFIG_DRM_MSM_GPU_SUDO) && submit->in_rb) { > priv->lastctx = NULL; > - a5xx_submit_in_rb(gpu, submit, ctx); > + a5xx_submit_in_rb(gpu, submit); > return; > } > > @@ -148,7 +146,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index c5a3e4d4c007..5eabb0109577 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -81,8 +81,7 @@ static void get_stats_counter(struct msm_ringbuffer *ring, u32 counter, > OUT_RING(ring, upper_32_bits(iova)); > } > > -static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT; > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -115,7 +114,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index d2dbb6968cba..533a34b4cce2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -457,8 +457,7 @@ void adreno_recover(struct msm_gpu *gpu) > } > } > > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -472,7 +471,7 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > /* ignore if there has not been a ctx switch: */ > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index e55abae365b5..848632758450 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -269,8 +269,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, > const struct firmware *fw, u64 *iova); > int adreno_hw_init(struct msm_gpu *gpu); > void adreno_recover(struct msm_gpu *gpu); > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > index 1464b04d25d3..aa5c60a7132d 100644 > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > @@ -785,7 +785,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, > } > } > > - msm_gpu_submit(gpu, submit, ctx); > + msm_gpu_submit(gpu, submit); > > args->fence = submit->fence->seqno; > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 806eb0957280..e1a3cbe25a0c 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -520,7 +520,7 @@ static void recover_worker(struct work_struct *work) > struct msm_ringbuffer *ring = gpu->rb[i]; > > list_for_each_entry(submit, &ring->submits, node) > - gpu->funcs->submit(gpu, submit, NULL); > + gpu->funcs->submit(gpu, submit); > } > } > > @@ -747,8 +747,7 @@ void msm_gpu_retire(struct msm_gpu *gpu) > } > > /* add bo's to gpu's ring, and kick gpu: */ > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct drm_device *dev = gpu->dev; > struct msm_drm_private *priv = dev->dev_private; > @@ -788,8 +787,8 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > msm_gem_move_to_active(&msm_obj->base, gpu, false, submit->fence); > } > > - gpu->funcs->submit(gpu, submit, ctx); > - priv->lastctx = ctx; > + gpu->funcs->submit(gpu, submit); > + priv->lastctx = submit->queue->ctx; > > hangcheck_timer_reset(gpu); > } > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 97c527e98391..1f96ac0d9049 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -45,8 +45,7 @@ struct msm_gpu_funcs { > int (*hw_init)(struct msm_gpu *gpu); > int (*pm_suspend)(struct msm_gpu *gpu); > int (*pm_resume)(struct msm_gpu *gpu); > - void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > + void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > irqreturn_t (*irq)(struct msm_gpu *irq); > struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu); > @@ -290,8 +289,7 @@ int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, > uint32_t *totaltime, uint32_t ncntrs, uint32_t *cntrs); > > void msm_gpu_retire(struct msm_gpu *gpu); > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > > int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, > -- > 2.26.2 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 949C2C433E6 for ; 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Mon, 31 Aug 2020 22:06:22 -0700 (PDT) Received: from yoga ([2605:6000:e5cb:c100:8898:14ff:fe6d:34e]) by smtp.gmail.com with ESMTPSA id i23sm35706oos.17.2020.08.31.22.06.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2020 22:06:21 -0700 (PDT) Date: Tue, 1 Sep 2020 00:06:18 -0500 From: Bjorn Andersson To: Rob Clark Subject: Re: [PATCH 12/19] drm/msm: Drop context arg to gpu->submit() Message-ID: <20200901050618.GT3715@yoga> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> <20200814024114.1177553-13-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200814024114.1177553-13-robdclark@gmail.com> Cc: David Airlie , Akhil P Oommen , dri-devel@lists.freedesktop.org, Eric Anholt , Vivek Gautam , AngeloGioacchino Del Regno , Will Deacon , Emil Velikov , Rob Clark , Jonathan Marek , Ben Dooks , Sibi Sankar , Brian Masney , linux-arm-msm@vger.kernel.org, Sharat Masetty , Stephen Boyd , Sean Paul , linux-arm-kernel@lists.infradead.org, Shawn Guo , freedreno@lists.freedesktop.org, open list , iommu@lists.linux-foundation.org, Daniel Vetter , Wambui Karuga , Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Now that we can get the ctx from the submitqueue, the extra arg is > redundant. > Reviewed-by: Bjorn Andersson > Signed-off-by: Jordan Crouse > [split out of previous patch to reduce churny noise] > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++------- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-- > drivers/gpu/drm/msm/msm_gem_submit.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.c | 9 ++++----- > drivers/gpu/drm/msm/msm_gpu.h | 6 ++---- > 7 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 9e63a190642c..eff2439ea57b 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -43,8 +43,7 @@ static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) > gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); > } > > -static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct msm_drm_private *priv = gpu->dev->dev_private; > struct msm_ringbuffer *ring = submit->ring; > @@ -57,7 +56,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > @@ -103,8 +102,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > msm_gpu_retire(gpu); > } > > -static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); > @@ -114,7 +112,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > > if (IS_ENABLED(CONFIG_DRM_MSM_GPU_SUDO) && submit->in_rb) { > priv->lastctx = NULL; > - a5xx_submit_in_rb(gpu, submit, ctx); > + a5xx_submit_in_rb(gpu, submit); > return; > } > > @@ -148,7 +146,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index c5a3e4d4c007..5eabb0109577 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -81,8 +81,7 @@ static void get_stats_counter(struct msm_ringbuffer *ring, u32 counter, > OUT_RING(ring, upper_32_bits(iova)); > } > > -static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT; > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -115,7 +114,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index d2dbb6968cba..533a34b4cce2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -457,8 +457,7 @@ void adreno_recover(struct msm_gpu *gpu) > } > } > > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -472,7 +471,7 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > /* ignore if there has not been a ctx switch: */ > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index e55abae365b5..848632758450 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -269,8 +269,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, > const struct firmware *fw, u64 *iova); > int adreno_hw_init(struct msm_gpu *gpu); > void adreno_recover(struct msm_gpu *gpu); > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > index 1464b04d25d3..aa5c60a7132d 100644 > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > @@ -785,7 +785,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, > } > } > > - msm_gpu_submit(gpu, submit, ctx); > + msm_gpu_submit(gpu, submit); > > args->fence = submit->fence->seqno; > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 806eb0957280..e1a3cbe25a0c 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -520,7 +520,7 @@ static void recover_worker(struct work_struct *work) > struct msm_ringbuffer *ring = gpu->rb[i]; > > list_for_each_entry(submit, &ring->submits, node) > - gpu->funcs->submit(gpu, submit, NULL); > + gpu->funcs->submit(gpu, submit); > } > } > > @@ -747,8 +747,7 @@ void msm_gpu_retire(struct msm_gpu *gpu) > } > > /* add bo's to gpu's ring, and kick gpu: */ > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct drm_device *dev = gpu->dev; > struct msm_drm_private *priv = dev->dev_private; > @@ -788,8 +787,8 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > msm_gem_move_to_active(&msm_obj->base, gpu, false, submit->fence); > } > > - gpu->funcs->submit(gpu, submit, ctx); > - priv->lastctx = ctx; > + gpu->funcs->submit(gpu, submit); > + priv->lastctx = submit->queue->ctx; > > hangcheck_timer_reset(gpu); > } > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 97c527e98391..1f96ac0d9049 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -45,8 +45,7 @@ struct msm_gpu_funcs { > int (*hw_init)(struct msm_gpu *gpu); > int (*pm_suspend)(struct msm_gpu *gpu); > int (*pm_resume)(struct msm_gpu *gpu); > - void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > + void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > irqreturn_t (*irq)(struct msm_gpu *irq); > struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu); > @@ -290,8 +289,7 @@ int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, > uint32_t *totaltime, uint32_t ncntrs, uint32_t *cntrs); > > void msm_gpu_retire(struct msm_gpu *gpu); > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > > int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, > -- > 2.26.2 > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEDB0C433E6 for ; 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Mon, 31 Aug 2020 22:06:22 -0700 (PDT) Received: from yoga ([2605:6000:e5cb:c100:8898:14ff:fe6d:34e]) by smtp.gmail.com with ESMTPSA id i23sm35706oos.17.2020.08.31.22.06.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2020 22:06:21 -0700 (PDT) Date: Tue, 1 Sep 2020 00:06:18 -0500 From: Bjorn Andersson To: Rob Clark Subject: Re: [PATCH 12/19] drm/msm: Drop context arg to gpu->submit() Message-ID: <20200901050618.GT3715@yoga> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> <20200814024114.1177553-13-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200814024114.1177553-13-robdclark@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200901_010624_255155_1088F147 X-CRM114-Status: GOOD ( 23.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , Akhil P Oommen , dri-devel@lists.freedesktop.org, Eric Anholt , Vivek Gautam , AngeloGioacchino Del Regno , Will Deacon , Emil Velikov , Rob Clark , Sai Prakash Ranjan , Jonathan Marek , Joerg Roedel , Ben Dooks , Sibi Sankar , Brian Masney , linux-arm-msm@vger.kernel.org, Sharat Masetty , Stephen Boyd , Jordan Crouse , Sean Paul , linux-arm-kernel@lists.infradead.org, Shawn Guo , freedreno@lists.freedesktop.org, open list , iommu@lists.linux-foundation.org, Daniel Vetter , Wambui Karuga , Robin Murphy Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Now that we can get the ctx from the submitqueue, the extra arg is > redundant. > Reviewed-by: Bjorn Andersson > Signed-off-by: Jordan Crouse > [split out of previous patch to reduce churny noise] > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++------- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-- > drivers/gpu/drm/msm/msm_gem_submit.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.c | 9 ++++----- > drivers/gpu/drm/msm/msm_gpu.h | 6 ++---- > 7 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 9e63a190642c..eff2439ea57b 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -43,8 +43,7 @@ static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) > gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); > } > > -static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct msm_drm_private *priv = gpu->dev->dev_private; > struct msm_ringbuffer *ring = submit->ring; > @@ -57,7 +56,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > @@ -103,8 +102,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > msm_gpu_retire(gpu); > } > > -static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); > @@ -114,7 +112,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > > if (IS_ENABLED(CONFIG_DRM_MSM_GPU_SUDO) && submit->in_rb) { > priv->lastctx = NULL; > - a5xx_submit_in_rb(gpu, submit, ctx); > + a5xx_submit_in_rb(gpu, submit); > return; > } > > @@ -148,7 +146,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index c5a3e4d4c007..5eabb0109577 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -81,8 +81,7 @@ static void get_stats_counter(struct msm_ringbuffer *ring, u32 counter, > OUT_RING(ring, upper_32_bits(iova)); > } > > -static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT; > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -115,7 +114,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index d2dbb6968cba..533a34b4cce2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -457,8 +457,7 @@ void adreno_recover(struct msm_gpu *gpu) > } > } > > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -472,7 +471,7 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > /* ignore if there has not been a ctx switch: */ > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index e55abae365b5..848632758450 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -269,8 +269,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, > const struct firmware *fw, u64 *iova); > int adreno_hw_init(struct msm_gpu *gpu); > void adreno_recover(struct msm_gpu *gpu); > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > index 1464b04d25d3..aa5c60a7132d 100644 > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > @@ -785,7 +785,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, > } > } > > - msm_gpu_submit(gpu, submit, ctx); > + msm_gpu_submit(gpu, submit); > > args->fence = submit->fence->seqno; > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 806eb0957280..e1a3cbe25a0c 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -520,7 +520,7 @@ static void recover_worker(struct work_struct *work) > struct msm_ringbuffer *ring = gpu->rb[i]; > > list_for_each_entry(submit, &ring->submits, node) > - gpu->funcs->submit(gpu, submit, NULL); > + gpu->funcs->submit(gpu, submit); > } > } > > @@ -747,8 +747,7 @@ void msm_gpu_retire(struct msm_gpu *gpu) > } > > /* add bo's to gpu's ring, and kick gpu: */ > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct drm_device *dev = gpu->dev; > struct msm_drm_private *priv = dev->dev_private; > @@ -788,8 +787,8 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > msm_gem_move_to_active(&msm_obj->base, gpu, false, submit->fence); > } > > - gpu->funcs->submit(gpu, submit, ctx); > - priv->lastctx = ctx; > + gpu->funcs->submit(gpu, submit); > + priv->lastctx = submit->queue->ctx; > > hangcheck_timer_reset(gpu); > } > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 97c527e98391..1f96ac0d9049 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -45,8 +45,7 @@ struct msm_gpu_funcs { > int (*hw_init)(struct msm_gpu *gpu); > int (*pm_suspend)(struct msm_gpu *gpu); > int (*pm_resume)(struct msm_gpu *gpu); > - void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > + void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > irqreturn_t (*irq)(struct msm_gpu *irq); > struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu); > @@ -290,8 +289,7 @@ int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, > uint32_t *totaltime, uint32_t ncntrs, uint32_t *cntrs); > > void msm_gpu_retire(struct msm_gpu *gpu); > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > > int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, > -- > 2.26.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3AA9C433E2 for ; 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Mon, 31 Aug 2020 22:06:22 -0700 (PDT) Received: from yoga ([2605:6000:e5cb:c100:8898:14ff:fe6d:34e]) by smtp.gmail.com with ESMTPSA id i23sm35706oos.17.2020.08.31.22.06.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2020 22:06:21 -0700 (PDT) Date: Tue, 1 Sep 2020 00:06:18 -0500 From: Bjorn Andersson To: Rob Clark Subject: Re: [PATCH 12/19] drm/msm: Drop context arg to gpu->submit() Message-ID: <20200901050618.GT3715@yoga> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> <20200814024114.1177553-13-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200814024114.1177553-13-robdclark@gmail.com> X-Mailman-Approved-At: Tue, 01 Sep 2020 07:31:54 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , Akhil P Oommen , dri-devel@lists.freedesktop.org, Vivek Gautam , AngeloGioacchino Del Regno , Will Deacon , Emil Velikov , Rob Clark , Sai Prakash Ranjan , Jonathan Marek , Joerg Roedel , Ben Dooks , Sibi Sankar , Brian Masney , linux-arm-msm@vger.kernel.org, Sharat Masetty , Stephen Boyd , Sean Paul , linux-arm-kernel@lists.infradead.org, freedreno@lists.freedesktop.org, open list , iommu@lists.linux-foundation.org, Wambui Karuga , Robin Murphy Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Now that we can get the ctx from the submitqueue, the extra arg is > redundant. > Reviewed-by: Bjorn Andersson > Signed-off-by: Jordan Crouse > [split out of previous patch to reduce churny noise] > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++------- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 5 ++--- > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-- > drivers/gpu/drm/msm/msm_gem_submit.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.c | 9 ++++----- > drivers/gpu/drm/msm/msm_gpu.h | 6 ++---- > 7 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 9e63a190642c..eff2439ea57b 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -43,8 +43,7 @@ static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) > gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); > } > > -static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct msm_drm_private *priv = gpu->dev->dev_private; > struct msm_ringbuffer *ring = submit->ring; > @@ -57,7 +56,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > @@ -103,8 +102,7 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit > msm_gpu_retire(gpu); > } > > -static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); > @@ -114,7 +112,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > > if (IS_ENABLED(CONFIG_DRM_MSM_GPU_SUDO) && submit->in_rb) { > priv->lastctx = NULL; > - a5xx_submit_in_rb(gpu, submit, ctx); > + a5xx_submit_in_rb(gpu, submit); > return; > } > > @@ -148,7 +146,7 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index c5a3e4d4c007..5eabb0109577 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -81,8 +81,7 @@ static void get_stats_counter(struct msm_ringbuffer *ring, u32 counter, > OUT_RING(ring, upper_32_bits(iova)); > } > > -static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT; > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -115,7 +114,7 @@ static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > case MSM_SUBMIT_CMD_IB_TARGET_BUF: > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index d2dbb6968cba..533a34b4cce2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -457,8 +457,7 @@ void adreno_recover(struct msm_gpu *gpu) > } > } > > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); > struct msm_drm_private *priv = gpu->dev->dev_private; > @@ -472,7 +471,7 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > break; > case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: > /* ignore if there has not been a ctx switch: */ > - if (priv->lastctx == ctx) > + if (priv->lastctx == submit->queue->ctx) > break; > /* fall-thru */ > case MSM_SUBMIT_CMD_BUF: > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index e55abae365b5..848632758450 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -269,8 +269,7 @@ struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, > const struct firmware *fw, u64 *iova); > int adreno_hw_init(struct msm_gpu *gpu); > void adreno_recover(struct msm_gpu *gpu); > -void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > index 1464b04d25d3..aa5c60a7132d 100644 > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > @@ -785,7 +785,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, > } > } > > - msm_gpu_submit(gpu, submit, ctx); > + msm_gpu_submit(gpu, submit); > > args->fence = submit->fence->seqno; > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 806eb0957280..e1a3cbe25a0c 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -520,7 +520,7 @@ static void recover_worker(struct work_struct *work) > struct msm_ringbuffer *ring = gpu->rb[i]; > > list_for_each_entry(submit, &ring->submits, node) > - gpu->funcs->submit(gpu, submit, NULL); > + gpu->funcs->submit(gpu, submit); > } > } > > @@ -747,8 +747,7 @@ void msm_gpu_retire(struct msm_gpu *gpu) > } > > /* add bo's to gpu's ring, and kick gpu: */ > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx) > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) > { > struct drm_device *dev = gpu->dev; > struct msm_drm_private *priv = dev->dev_private; > @@ -788,8 +787,8 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > msm_gem_move_to_active(&msm_obj->base, gpu, false, submit->fence); > } > > - gpu->funcs->submit(gpu, submit, ctx); > - priv->lastctx = ctx; > + gpu->funcs->submit(gpu, submit); > + priv->lastctx = submit->queue->ctx; > > hangcheck_timer_reset(gpu); > } > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 97c527e98391..1f96ac0d9049 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -45,8 +45,7 @@ struct msm_gpu_funcs { > int (*hw_init)(struct msm_gpu *gpu); > int (*pm_suspend)(struct msm_gpu *gpu); > int (*pm_resume)(struct msm_gpu *gpu); > - void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > + void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit); > void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); > irqreturn_t (*irq)(struct msm_gpu *irq); > struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu); > @@ -290,8 +289,7 @@ int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, > uint32_t *totaltime, uint32_t ncntrs, uint32_t *cntrs); > > void msm_gpu_retire(struct msm_gpu *gpu); > -void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, > - struct msm_file_private *ctx); > +void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit); > > int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, > -- > 2.26.2 > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel