From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 980B8C433E2 for ; Fri, 4 Sep 2020 09:11:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7368E2087C for ; Fri, 4 Sep 2020 09:11:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729979AbgIDJLW (ORCPT ); Fri, 4 Sep 2020 05:11:22 -0400 Received: from 8bytes.org ([81.169.241.247]:40892 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729950AbgIDJLV (ORCPT ); Fri, 4 Sep 2020 05:11:21 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id 4466F3D5; Fri, 4 Sep 2020 11:11:19 +0200 (CEST) Date: Fri, 4 Sep 2020 11:11:17 +0200 From: Joerg Roedel To: Rob Clark Cc: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan , Will Deacon , freedreno@lists.freedesktop.org, Bjorn Andersson , Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Rob Clark , Akhil P Oommen , AngeloGioacchino Del Regno , Ben Dooks , Brian Masney , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Emil Velikov , Eric Anholt , Greg Kroah-Hartman , Hanna Hawa , Joerg Roedel , John Stultz , Jonathan Marek , Jon Hunter , Jordan Crouse , Krishna Reddy , "moderated list:ARM SMMU DRIVERS" , open list , Nicolin Chen , Pritesh Raithatha , Sam Ravnborg , Sharat Masetty , Shawn Guo , Takashi Iwai , Thierry Reding , Thierry Reding , Wambui Karuga Subject: Re: [PATCH 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Message-ID: <20200904091117.GH6714@8bytes.org> References: <20200817220238.603465-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200817220238.603465-1-robdclark@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > Jordan Crouse (12): > iommu/arm-smmu: Pass io-pgtable config to implementation specific > function > iommu/arm-smmu: Add support for split pagetables > iommu/arm-smmu: Prepare for the adreno-smmu implementation > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > drm/msm: Add a context pointer to the submitqueue > drm/msm: Drop context arg to gpu->submit() > drm/msm: Set the global virtual address range from the IOMMU domain > drm/msm: Add support to create a local pagetable > drm/msm: Add support for private address space instances > drm/msm/a6xx: Add support for per-instance pagetables > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > Rob Clark (8): > drm/msm: remove dangling submitqueue references > iommu: add private interface for adreno-smmu > drm/msm/gpu: add dev_to_gpu() helper > drm/msm: set adreno_smmu as gpu's drvdata > iommu/arm-smmu: constify some helpers > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > iommu/arm-smmu: add a way for implementations to influence SCTLR > drm/msm: show process names in gem_describe Can the DRM parts be merged independently from the IOMMU parts or does this need to be queued together? If it needs to be together I defer the decission to Will through which tree this should go. Joerg From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53054C43461 for ; Fri, 4 Sep 2020 09:11:24 +0000 (UTC) Received: from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 21D1F2087C for ; Fri, 4 Sep 2020 09:11:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 21D1F2087C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=8bytes.org Authentication-Results: mail.kernel.org; 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Fri, 4 Sep 2020 09:11:21 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nFXeUoq-fooJ for ; Fri, 4 Sep 2020 09:11:21 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from theia.8bytes.org (8bytes.org [81.169.241.247]) by hemlock.osuosl.org (Postfix) with ESMTPS id E1C51873FC for ; Fri, 4 Sep 2020 09:11:20 +0000 (UTC) Received: by theia.8bytes.org (Postfix, from userid 1000) id 4466F3D5; Fri, 4 Sep 2020 11:11:19 +0200 (CEST) Date: Fri, 4 Sep 2020 11:11:17 +0200 From: Joerg Roedel To: Rob Clark Subject: Re: [PATCH 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Message-ID: <20200904091117.GH6714@8bytes.org> References: <20200817220238.603465-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200817220238.603465-1-robdclark@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Cc: Wambui Karuga , Takashi Iwai , Hanna Hawa , Akhil P Oommen , dri-devel@lists.freedesktop.org, Eric Anholt , Thierry Reding , Vivek Gautam , AngeloGioacchino Del Regno , Will Deacon , Emil Velikov , Rob Clark , Jonathan Marek , Sam Ravnborg , Jon Hunter , Ben Dooks , Sibi Sankar , Thierry Reding , Brian Masney , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Joerg Roedel , linux-arm-msm@vger.kernel.org, Sharat Masetty , Pritesh Raithatha , Stephen Boyd , John Stultz , freedreno@lists.freedesktop.org, "moderated list:ARM SMMU DRIVERS" , Greg Kroah-Hartman , open list , iommu@lists.linux-foundation.org, Shawn Guo , Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > Jordan Crouse (12): > iommu/arm-smmu: Pass io-pgtable config to implementation specific > function > iommu/arm-smmu: Add support for split pagetables > iommu/arm-smmu: Prepare for the adreno-smmu implementation > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > drm/msm: Add a context pointer to the submitqueue > drm/msm: Drop context arg to gpu->submit() > drm/msm: Set the global virtual address range from the IOMMU domain > drm/msm: Add support to create a local pagetable > drm/msm: Add support for private address space instances > drm/msm/a6xx: Add support for per-instance pagetables > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > Rob Clark (8): > drm/msm: remove dangling submitqueue references > iommu: add private interface for adreno-smmu > drm/msm/gpu: add dev_to_gpu() helper > drm/msm: set adreno_smmu as gpu's drvdata > iommu/arm-smmu: constify some helpers > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > iommu/arm-smmu: add a way for implementations to influence SCTLR > drm/msm: show process names in gem_describe Can the DRM parts be merged independently from the IOMMU parts or does this need to be queued together? If it needs to be together I defer the decission to Will through which tree this should go. Joerg _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3138EC433E2 for ; Fri, 4 Sep 2020 09:12:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E3B1720748 for ; Fri, 4 Sep 2020 09:12:29 +0000 (UTC) Authentication-Results: mail.kernel.org; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > Jordan Crouse (12): > iommu/arm-smmu: Pass io-pgtable config to implementation specific > function > iommu/arm-smmu: Add support for split pagetables > iommu/arm-smmu: Prepare for the adreno-smmu implementation > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > drm/msm: Add a context pointer to the submitqueue > drm/msm: Drop context arg to gpu->submit() > drm/msm: Set the global virtual address range from the IOMMU domain > drm/msm: Add support to create a local pagetable > drm/msm: Add support for private address space instances > drm/msm/a6xx: Add support for per-instance pagetables > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > Rob Clark (8): > drm/msm: remove dangling submitqueue references > iommu: add private interface for adreno-smmu > drm/msm/gpu: add dev_to_gpu() helper > drm/msm: set adreno_smmu as gpu's drvdata > iommu/arm-smmu: constify some helpers > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > iommu/arm-smmu: add a way for implementations to influence SCTLR > drm/msm: show process names in gem_describe Can the DRM parts be merged independently from the IOMMU parts or does this need to be queued together? If it needs to be together I defer the decission to Will through which tree this should go. Joerg _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0868BC433E2 for ; Sat, 5 Sep 2020 00:35:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D3142087C for ; Sat, 5 Sep 2020 00:35:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7D3142087C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=8bytes.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 75B806ECF7; Sat, 5 Sep 2020 00:35:29 +0000 (UTC) X-Greylist: delayed 371 seconds by postgrey-1.36 at gabe; Fri, 04 Sep 2020 09:17:34 UTC Received: from theia.8bytes.org (8bytes.org [81.169.241.247]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB91D6EB31; Fri, 4 Sep 2020 09:17:34 +0000 (UTC) Received: by theia.8bytes.org (Postfix, from userid 1000) id 4466F3D5; Fri, 4 Sep 2020 11:11:19 +0200 (CEST) Date: Fri, 4 Sep 2020 11:11:17 +0200 From: Joerg Roedel To: Rob Clark Subject: Re: [PATCH 00/20] iommu/arm-smmu + drm/msm: per-process GPU pgtables Message-ID: <20200904091117.GH6714@8bytes.org> References: <20200817220238.603465-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200817220238.603465-1-robdclark@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-Mailman-Approved-At: Sat, 05 Sep 2020 00:35:27 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Wambui Karuga , Hanna Hawa , Akhil P Oommen , dri-devel@lists.freedesktop.org, Bjorn Andersson , Thierry Reding , Vivek Gautam , AngeloGioacchino Del Regno , Will Deacon , Emil Velikov , Rob Clark , Sai Prakash Ranjan , Jonathan Marek , Sam Ravnborg , Jon Hunter , Ben Dooks , Sibi Sankar , Thierry Reding , Brian Masney , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Joerg Roedel , linux-arm-msm@vger.kernel.org, Sharat Masetty , Pritesh Raithatha , Stephen Boyd , Nicolin Chen , freedreno@lists.freedesktop.org, "moderated list:ARM SMMU DRIVERS" , Greg Kroah-Hartman , Krishna Reddy , open list , iommu@lists.linux-foundation.org, Robin Murphy Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > Jordan Crouse (12): > iommu/arm-smmu: Pass io-pgtable config to implementation specific > function > iommu/arm-smmu: Add support for split pagetables > iommu/arm-smmu: Prepare for the adreno-smmu implementation > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > drm/msm: Add a context pointer to the submitqueue > drm/msm: Drop context arg to gpu->submit() > drm/msm: Set the global virtual address range from the IOMMU domain > drm/msm: Add support to create a local pagetable > drm/msm: Add support for private address space instances > drm/msm/a6xx: Add support for per-instance pagetables > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > Rob Clark (8): > drm/msm: remove dangling submitqueue references > iommu: add private interface for adreno-smmu > drm/msm/gpu: add dev_to_gpu() helper > drm/msm: set adreno_smmu as gpu's drvdata > iommu/arm-smmu: constify some helpers > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > iommu/arm-smmu: add a way for implementations to influence SCTLR > drm/msm: show process names in gem_describe Can the DRM parts be merged independently from the IOMMU parts or does this need to be queued together? If it needs to be together I defer the decission to Will through which tree this should go. Joerg _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel