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X-UUID: 113e40659580488ab5136c06989e6f1f-20200905 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1107935372; Sat, 05 Sep 2020 16:11:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 5 Sep 2020 16:11:19 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 5 Sep 2020 16:11:18 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy Subject: [PATCH v2 00/23] MT8192 IOMMU support Date: Sat, 5 Sep 2020 16:08:57 +0800 Message-ID: <20200905080920.13396-1-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Will Deacon , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" This patch mainly adds support for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U | ------------ SMI Common ------------ | +-------+------+------+----------------------+-------+ | | | | ...... | | | | | | | | larb0 larb1 larb2 larb4 ...... larb19 larb20 disp0 disp1 mdp vdec IPE IPE All the connections are HW fixed, SW can NOT adjust it. Comparing with the preview SoC, this patchset mainly adds two new functions: a) add iova 34 bits support. b) add multi domains support since several HW has the special iova region requirement. this patchset depend on v5.9-rc1. change note: v2: a) Convert IOMMU/SMI dt-binding to DT schema. b) Fix some comment from Pi-Hsun and Nicolas. like use generic_iommu_put_resv_regions. c) Reword some comment, like add how to use domain-id. v1: https://lore.kernel.org/linux-iommu/20200711064846.16007-1-yong.wu@mediatek.com/ Yong Wu (23): dt-bindings: iommu: mediatek: Convert IOMMU to DT schema dt-bindings: memory: mediatek: Convert SMI to DT schema dt-bindings: memory: mediatek: Add a common larb-port header file dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 dt-bindings: memory: mediatek: Add domain definition dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI iommu/mediatek: Use the common mtk-smi-larb-port.h iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek iommu/mediatek: Move hw_init into attach_device iommu/mediatek: Add device link for smi-common and m4u iommu/mediatek: Add power-domain operation iommu/mediatek: Add iova reserved function iommu/mediatek: Add single domain iommu/mediatek: Support master use iova over 32bit iommu/mediatek: Support up to 34bit iova in tlb flush iommu/mediatek: Support report iova 34bit translation fault in ISR iommu/mediatek: Add support for multi domain iommu/mediatek: Adjust the structure iommu/mediatek: Add mt8192 support memory: mtk-smi: Add mt8192 support .../bindings/iommu/mediatek,iommu.txt | 103 -------- .../bindings/iommu/mediatek,iommu.yaml | 155 +++++++++++ .../mediatek,smi-common.txt | 49 ---- .../mediatek,smi-common.yaml | 97 +++++++ .../memory-controllers/mediatek,smi-larb.txt | 49 ---- .../memory-controllers/mediatek,smi-larb.yaml | 86 ++++++ drivers/iommu/io-pgtable-arm-v7s.c | 57 ++-- drivers/iommu/mtk_iommu.c | 247 ++++++++++++++---- drivers/iommu/mtk_iommu.h | 11 +- drivers/memory/mtk-smi.c | 27 ++ include/dt-bindings/memory/mt2712-larb-port.h | 2 +- include/dt-bindings/memory/mt6779-larb-port.h | 2 +- include/dt-bindings/memory/mt8173-larb-port.h | 2 +- include/dt-bindings/memory/mt8183-larb-port.h | 2 +- include/dt-bindings/memory/mt8192-larb-port.h | 239 +++++++++++++++++ .../dt-bindings/memory/mtk-smi-larb-port.h | 22 ++ include/linux/io-pgtable.h | 4 +- include/soc/mediatek/smi.h | 3 +- 18 files changed, 880 insertions(+), 277 deletions(-) delete mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h -- 2.18.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 450ACC43461 for ; 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Sat, 5 Sep 2020 16:11:19 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 5 Sep 2020 16:11:18 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy Subject: [PATCH v2 00/23] MT8192 IOMMU support Date: Sat, 5 Sep 2020 16:08:57 +0800 Message-ID: <20200905080920.13396-1-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200905_041134_150772_357D049F X-CRM114-Status: GOOD ( 14.79 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, yong.wu@mediatek.com, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This patch mainly adds support for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U | ------------ SMI Common ------------ | +-------+------+------+----------------------+-------+ | | | | ...... | | | | | | | | larb0 larb1 larb2 larb4 ...... larb19 larb20 disp0 disp1 mdp vdec IPE IPE All the connections are HW fixed, SW can NOT adjust it. Comparing with the preview SoC, this patchset mainly adds two new functions: a) add iova 34 bits support. b) add multi domains support since several HW has the special iova region requirement. this patchset depend on v5.9-rc1. change note: v2: a) Convert IOMMU/SMI dt-binding to DT schema. b) Fix some comment from Pi-Hsun and Nicolas. like use generic_iommu_put_resv_regions. c) Reword some comment, like add how to use domain-id. v1: https://lore.kernel.org/linux-iommu/20200711064846.16007-1-yong.wu@mediatek.com/ Yong Wu (23): dt-bindings: iommu: mediatek: Convert IOMMU to DT schema dt-bindings: memory: mediatek: Convert SMI to DT schema dt-bindings: memory: mediatek: Add a common larb-port header file dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 dt-bindings: memory: mediatek: Add domain definition dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI iommu/mediatek: Use the common mtk-smi-larb-port.h iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek iommu/mediatek: Move hw_init into attach_device iommu/mediatek: Add device link for smi-common and m4u iommu/mediatek: Add power-domain operation iommu/mediatek: Add iova reserved function iommu/mediatek: Add single domain iommu/mediatek: Support master use iova over 32bit iommu/mediatek: Support up to 34bit iova in tlb flush iommu/mediatek: Support report iova 34bit translation fault in ISR iommu/mediatek: Add support for multi domain iommu/mediatek: Adjust the structure iommu/mediatek: Add mt8192 support memory: mtk-smi: Add mt8192 support .../bindings/iommu/mediatek,iommu.txt | 103 -------- .../bindings/iommu/mediatek,iommu.yaml | 155 +++++++++++ .../mediatek,smi-common.txt | 49 ---- .../mediatek,smi-common.yaml | 97 +++++++ .../memory-controllers/mediatek,smi-larb.txt | 49 ---- .../memory-controllers/mediatek,smi-larb.yaml | 86 ++++++ drivers/iommu/io-pgtable-arm-v7s.c | 57 ++-- drivers/iommu/mtk_iommu.c | 247 ++++++++++++++---- drivers/iommu/mtk_iommu.h | 11 +- drivers/memory/mtk-smi.c | 27 ++ include/dt-bindings/memory/mt2712-larb-port.h | 2 +- include/dt-bindings/memory/mt6779-larb-port.h | 2 +- include/dt-bindings/memory/mt8173-larb-port.h | 2 +- include/dt-bindings/memory/mt8183-larb-port.h | 2 +- include/dt-bindings/memory/mt8192-larb-port.h | 239 +++++++++++++++++ .../dt-bindings/memory/mtk-smi-larb-port.h | 22 ++ include/linux/io-pgtable.h | 4 +- include/soc/mediatek/smi.h | 3 +- 18 files changed, 880 insertions(+), 277 deletions(-) delete mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A22F7C2D0E0 for ; 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Sat, 5 Sep 2020 16:11:19 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 5 Sep 2020 16:11:18 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy Subject: [PATCH v2 00/23] MT8192 IOMMU support Date: Sat, 5 Sep 2020 16:08:57 +0800 Message-ID: <20200905080920.13396-1-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200905_041134_150772_357D049F X-CRM114-Status: GOOD ( 14.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, yong.wu@mediatek.com, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch mainly adds support for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U | ------------ SMI Common ------------ | +-------+------+------+----------------------+-------+ | | | | ...... | | | | | | | | larb0 larb1 larb2 larb4 ...... larb19 larb20 disp0 disp1 mdp vdec IPE IPE All the connections are HW fixed, SW can NOT adjust it. Comparing with the preview SoC, this patchset mainly adds two new functions: a) add iova 34 bits support. b) add multi domains support since several HW has the special iova region requirement. this patchset depend on v5.9-rc1. change note: v2: a) Convert IOMMU/SMI dt-binding to DT schema. b) Fix some comment from Pi-Hsun and Nicolas. like use generic_iommu_put_resv_regions. c) Reword some comment, like add how to use domain-id. v1: https://lore.kernel.org/linux-iommu/20200711064846.16007-1-yong.wu@mediatek.com/ Yong Wu (23): dt-bindings: iommu: mediatek: Convert IOMMU to DT schema dt-bindings: memory: mediatek: Convert SMI to DT schema dt-bindings: memory: mediatek: Add a common larb-port header file dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 dt-bindings: memory: mediatek: Add domain definition dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI iommu/mediatek: Use the common mtk-smi-larb-port.h iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek iommu/mediatek: Move hw_init into attach_device iommu/mediatek: Add device link for smi-common and m4u iommu/mediatek: Add power-domain operation iommu/mediatek: Add iova reserved function iommu/mediatek: Add single domain iommu/mediatek: Support master use iova over 32bit iommu/mediatek: Support up to 34bit iova in tlb flush iommu/mediatek: Support report iova 34bit translation fault in ISR iommu/mediatek: Add support for multi domain iommu/mediatek: Adjust the structure iommu/mediatek: Add mt8192 support memory: mtk-smi: Add mt8192 support .../bindings/iommu/mediatek,iommu.txt | 103 -------- .../bindings/iommu/mediatek,iommu.yaml | 155 +++++++++++ .../mediatek,smi-common.txt | 49 ---- .../mediatek,smi-common.yaml | 97 +++++++ .../memory-controllers/mediatek,smi-larb.txt | 49 ---- .../memory-controllers/mediatek,smi-larb.yaml | 86 ++++++ drivers/iommu/io-pgtable-arm-v7s.c | 57 ++-- drivers/iommu/mtk_iommu.c | 247 ++++++++++++++---- drivers/iommu/mtk_iommu.h | 11 +- drivers/memory/mtk-smi.c | 27 ++ include/dt-bindings/memory/mt2712-larb-port.h | 2 +- include/dt-bindings/memory/mt6779-larb-port.h | 2 +- include/dt-bindings/memory/mt8173-larb-port.h | 2 +- include/dt-bindings/memory/mt8183-larb-port.h | 2 +- include/dt-bindings/memory/mt8192-larb-port.h | 239 +++++++++++++++++ .../dt-bindings/memory/mtk-smi-larb-port.h | 22 ++ include/linux/io-pgtable.h | 4 +- include/soc/mediatek/smi.h | 3 +- 18 files changed, 880 insertions(+), 277 deletions(-) delete mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MIME_BASE64_TEXT,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=no 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Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy CC: Will Deacon , Evan Green , Tomasz Figa , , , , , , , , , Nicolas Boichat , , , Subject: [PATCH v2 00/23] MT8192 IOMMU support Date: Sat, 5 Sep 2020 16:08:57 +0800 Message-ID: <20200905080920.13396-1-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Content-Transfer-Encoding: base64 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org VGhpcyBwYXRjaCBtYWlubHkgYWRkcyBzdXBwb3J0IGZvciBtdDgxOTIgSU9NTVUgYW5kIFNNSS4N Cg0KbXQ4MTkyIGFsc28gaXMgTVRLIElPTU1VIGdlbjIgd2hpY2ggdXNlcyBBUk0gU2hvcnQtRGVz Y3JpcHRvciB0cmFuc2xhdGlvbg0KdGFibGUgZm9ybWF0LiBUaGUgTTRVLVNNSSBIVyBkaWFncmFt IGlzIGFzIGJlbG93Og0KDQogICAgICAgICAgICAgICAgICAgICAgICAgIEVNSQ0KICAgICAgICAg ICAgICAgICAgICAgICAgICAgfA0KICAgICAgICAgICAgICAgICAgICAgICAgICBNNFUNCiAgICAg ICAgICAgICAgICAgICAgICAgICAgIHwNCiAgICAgICAgICAgICAgICAgICAgICAtLS0tLS0tLS0t LS0NCiAgICAgICAgICAgICAgICAgICAgICAgU01JIENvbW1vbg0KICAgICAgICAgICAgICAgICAg ICAgIC0tLS0tLS0tLS0tLQ0KICAgICAgICAgICAgICAgICAgICAgICAgICAgfA0KICArLS0tLS0t LSstLS0tLS0rLS0tLS0tKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0rLS0tLS0tLSsNCiAgfCAgICAg ICB8ICAgICAgfCAgICAgIHwgICAgICAgLi4uLi4uICAgICAgICAgfCAgICAgICB8DQogIHwgICAg ICAgfCAgICAgIHwgICAgICB8ICAgICAgICAgICAgICAgICAgICAgIHwgICAgICAgfA0KbGFyYjAg ICBsYXJiMSAgbGFyYjIgIGxhcmI0ICAgICAuLi4uLi4gICAgICBsYXJiMTkgICBsYXJiMjANCmRp c3AwICAgZGlzcDEgICBtZHAgICAgdmRlYyAgICAgICAgICAgICAgICAgICBJUEUgICAgICBJUEUN Cg0KQWxsIHRoZSBjb25uZWN0aW9ucyBhcmUgSFcgZml4ZWQsIFNXIGNhbiBOT1QgYWRqdXN0IGl0 Lg0KDQpDb21wYXJpbmcgd2l0aCB0aGUgcHJldmlldyBTb0MsIHRoaXMgcGF0Y2hzZXQgbWFpbmx5 IGFkZHMgdHdvIG5ldyBmdW5jdGlvbnM6DQphKSBhZGQgaW92YSAzNCBiaXRzIHN1cHBvcnQuDQpi KSBhZGQgbXVsdGkgZG9tYWlucyBzdXBwb3J0IHNpbmNlIHNldmVyYWwgSFcgaGFzIHRoZSBzcGVj aWFsIGlvdmENCnJlZ2lvbiByZXF1aXJlbWVudC4NCg0KdGhpcyBwYXRjaHNldCBkZXBlbmQgb24g djUuOS1yYzEuDQoNCmNoYW5nZSBub3RlOg0KdjI6DQogIGEpIENvbnZlcnQgSU9NTVUvU01JIGR0 LWJpbmRpbmcgdG8gRFQgc2NoZW1hLg0KICBiKSBGaXggc29tZSBjb21tZW50IGZyb20gUGktSHN1 biBhbmQgTmljb2xhcy4gbGlrZSB1c2UNCiAgZ2VuZXJpY19pb21tdV9wdXRfcmVzdl9yZWdpb25z Lg0KICBjKSBSZXdvcmQgc29tZSBjb21tZW50LCBsaWtlIGFkZCBob3cgdG8gdXNlIGRvbWFpbi1p ZC4NCiAgDQp2MTogaHR0cHM6Ly9sb3JlLmtlcm5lbC5vcmcvbGludXgtaW9tbXUvMjAyMDA3MTEw NjQ4NDYuMTYwMDctMS15b25nLnd1QG1lZGlhdGVrLmNvbS8NCg0KWW9uZyBXdSAoMjMpOg0KICBk dC1iaW5kaW5nczogaW9tbXU6IG1lZGlhdGVrOiBDb252ZXJ0IElPTU1VIHRvIERUIHNjaGVtYQ0K ICBkdC1iaW5kaW5nczogbWVtb3J5OiBtZWRpYXRlazogQ29udmVydCBTTUkgdG8gRFQgc2NoZW1h DQogIGR0LWJpbmRpbmdzOiBtZW1vcnk6IG1lZGlhdGVrOiBBZGQgYSBjb21tb24gbGFyYi1wb3J0 IGhlYWRlciBmaWxlDQogIGR0LWJpbmRpbmdzOiBtZW1vcnk6IG1lZGlhdGVrOiBFeHRlbmQgTEFS Ql9OUl9NQVggdG8gMzINCiAgZHQtYmluZGluZ3M6IG1lbW9yeTogbWVkaWF0ZWs6IEFkZCBkb21h aW4gZGVmaW5pdGlvbg0KICBkdC1iaW5kaW5nczogbWVkaWF0ZWs6IEFkZCBiaW5kaW5nIGZvciBt dDgxOTIgSU9NTVUgYW5kIFNNSQ0KICBpb21tdS9tZWRpYXRlazogVXNlIHRoZSBjb21tb24gbXRr LXNtaS1sYXJiLXBvcnQuaA0KICBpb21tdS9pby1wZ3RhYmxlLWFybS12N3M6IFVzZSBpYXMgdG8g Y2hlY2sgdGhlIHZhbGlkIGlvdmEgaW4gdW5tYXANCiAgaW9tbXUvaW8tcGd0YWJsZS1hcm0tdjdz OiBFeHRlbmQgUEEzNCBmb3IgTWVkaWFUZWsNCiAgaW9tbXUvaW8tcGd0YWJsZS1hcm0tdjdzOiBB ZGQgY2ZnIGFzIGEgcGFyYW0gaW4gc29tZSBtYWNyb3MNCiAgaW9tbXUvaW8tcGd0YWJsZS1hcm0t djdzOiBRdWFkIGx2bDEgcGd0YWJsZSBmb3IgTWVkaWFUZWsNCiAgaW9tbXUvbWVkaWF0ZWs6IE1v dmUgaHdfaW5pdCBpbnRvIGF0dGFjaF9kZXZpY2UNCiAgaW9tbXUvbWVkaWF0ZWs6IEFkZCBkZXZp Y2UgbGluayBmb3Igc21pLWNvbW1vbiBhbmQgbTR1DQogIGlvbW11L21lZGlhdGVrOiBBZGQgcG93 ZXItZG9tYWluIG9wZXJhdGlvbg0KICBpb21tdS9tZWRpYXRlazogQWRkIGlvdmEgcmVzZXJ2ZWQg ZnVuY3Rpb24NCiAgaW9tbXUvbWVkaWF0ZWs6IEFkZCBzaW5nbGUgZG9tYWluDQogIGlvbW11L21l ZGlhdGVrOiBTdXBwb3J0IG1hc3RlciB1c2UgaW92YSBvdmVyIDMyYml0DQogIGlvbW11L21lZGlh dGVrOiBTdXBwb3J0IHVwIHRvIDM0Yml0IGlvdmEgaW4gdGxiIGZsdXNoDQogIGlvbW11L21lZGlh dGVrOiBTdXBwb3J0IHJlcG9ydCBpb3ZhIDM0Yml0IHRyYW5zbGF0aW9uIGZhdWx0IGluIElTUg0K ICBpb21tdS9tZWRpYXRlazogQWRkIHN1cHBvcnQgZm9yIG11bHRpIGRvbWFpbg0KICBpb21tdS9t ZWRpYXRlazogQWRqdXN0IHRoZSBzdHJ1Y3R1cmUNCiAgaW9tbXUvbWVkaWF0ZWs6IEFkZCBtdDgx OTIgc3VwcG9ydA0KICBtZW1vcnk6IG10ay1zbWk6IEFkZCBtdDgxOTIgc3VwcG9ydA0KDQogLi4u L2JpbmRpbmdzL2lvbW11L21lZGlhdGVrLGlvbW11LnR4dCAgICAgICAgIHwgMTAzIC0tLS0tLS0t DQogLi4uL2JpbmRpbmdzL2lvbW11L21lZGlhdGVrLGlvbW11LnlhbWwgICAgICAgIHwgMTU1ICsr KysrKysrKysrDQogLi4uL21lZGlhdGVrLHNtaS1jb21tb24udHh0ICAgICAgICAgICAgICAgICAg IHwgIDQ5IC0tLS0NCiAuLi4vbWVkaWF0ZWssc21pLWNvbW1vbi55YW1sICAgICAgICAgICAgICAg ICAgfCAgOTcgKysrKysrKw0KIC4uLi9tZW1vcnktY29udHJvbGxlcnMvbWVkaWF0ZWssc21pLWxh cmIudHh0ICB8ICA0OSAtLS0tDQogLi4uL21lbW9yeS1jb250cm9sbGVycy9tZWRpYXRlayxzbWkt bGFyYi55YW1sIHwgIDg2ICsrKysrKw0KIGRyaXZlcnMvaW9tbXUvaW8tcGd0YWJsZS1hcm0tdjdz LmMgICAgICAgICAgICB8ICA1NyArKy0tDQogZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuYyAgICAg ICAgICAgICAgICAgICAgIHwgMjQ3ICsrKysrKysrKysrKysrLS0tLQ0KIGRyaXZlcnMvaW9tbXUv bXRrX2lvbW11LmggICAgICAgICAgICAgICAgICAgICB8ICAxMSArLQ0KIGRyaXZlcnMvbWVtb3J5 L210ay1zbWkuYyAgICAgICAgICAgICAgICAgICAgICB8ICAyNyArKw0KIGluY2x1ZGUvZHQtYmlu ZGluZ3MvbWVtb3J5L210MjcxMi1sYXJiLXBvcnQuaCB8ICAgMiArLQ0KIGluY2x1ZGUvZHQtYmlu ZGluZ3MvbWVtb3J5L210Njc3OS1sYXJiLXBvcnQuaCB8ICAgMiArLQ0KIGluY2x1ZGUvZHQtYmlu ZGluZ3MvbWVtb3J5L210ODE3My1sYXJiLXBvcnQuaCB8ICAgMiArLQ0KIGluY2x1ZGUvZHQtYmlu ZGluZ3MvbWVtb3J5L210ODE4My1sYXJiLXBvcnQuaCB8ICAgMiArLQ0KIGluY2x1ZGUvZHQtYmlu ZGluZ3MvbWVtb3J5L210ODE5Mi1sYXJiLXBvcnQuaCB8IDIzOSArKysrKysrKysrKysrKysrKw0K IC4uLi9kdC1iaW5kaW5ncy9tZW1vcnkvbXRrLXNtaS1sYXJiLXBvcnQuaCAgICB8ICAyMiArKw0K IGluY2x1ZGUvbGludXgvaW8tcGd0YWJsZS5oICAgICAgICAgICAgICAgICAgICB8ICAgNCArLQ0K IGluY2x1ZGUvc29jL21lZGlhdGVrL3NtaS5oICAgICAgICAgICAgICAgICAgICB8ICAgMyArLQ0K IDE4IGZpbGVzIGNoYW5nZWQsIDg4MCBpbnNlcnRpb25zKCspLCAyNzcgZGVsZXRpb25zKC0pDQog ZGVsZXRlIG1vZGUgMTAwNjQ0IERvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9pb21t dS9tZWRpYXRlayxpb21tdS50eHQNCiBjcmVhdGUgbW9kZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9k ZXZpY2V0cmVlL2JpbmRpbmdzL2lvbW11L21lZGlhdGVrLGlvbW11LnlhbWwNCiBkZWxldGUgbW9k ZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL21lbW9yeS1jb250cm9s bGVycy9tZWRpYXRlayxzbWktY29tbW9uLnR4dA0KIGNyZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVu dGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvbWVtb3J5LWNvbnRyb2xsZXJzL21lZGlhdGVrLHNt aS1jb21tb24ueWFtbA0KIGRlbGV0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2RldmljZXRy ZWUvYmluZGluZ3MvbWVtb3J5LWNvbnRyb2xsZXJzL21lZGlhdGVrLHNtaS1sYXJiLnR4dA0KIGNy ZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvbWVtb3J5 LWNvbnRyb2xsZXJzL21lZGlhdGVrLHNtaS1sYXJiLnlhbWwNCiBjcmVhdGUgbW9kZSAxMDA2NDQg aW5jbHVkZS9kdC1iaW5kaW5ncy9tZW1vcnkvbXQ4MTkyLWxhcmItcG9ydC5oDQogY3JlYXRlIG1v ZGUgMTAwNjQ0IGluY2x1ZGUvZHQtYmluZGluZ3MvbWVtb3J5L210ay1zbWktbGFyYi1wb3J0LmgN Cg0KLS0gDQoyLjE4LjANCg0K