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From: saeed@kernel.org
To: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Vu Pham <vuhuong@mellanox.com>,
	Bodong Wang <bodong@nvidia.com>, Roi Dayan <roid@nvidia.com>,
	Mark Bloch <mbloch@nvidia.com>,
	Saeed Mahameed <saeedm@nvidia.com>
Subject: [net-next 12/16] net/mlx5: E-Switch, Setup all vports' metadata to support peer miss rule
Date: Tue, 15 Sep 2020 13:25:29 -0700	[thread overview]
Message-ID: <20200915202533.64389-13-saeed@kernel.org> (raw)
In-Reply-To: <20200915202533.64389-1-saeed@kernel.org>

From: Vu Pham <vuhuong@mellanox.com>

In merged eswitch configuration, peer miss rule is setup for all
vports. If metadata is enabled, peer miss rule with metadata matching
will be configured instead of source port matching; however, some
vports that have not yet been enabled don't have default_metadata
setup and their default_metadata will be zero.

Hence, setup/cleanup default metadata for all vports when eswitch moves
in/out of offloads mode.

Fixes: 133dcfc577ea ("net/mlx5: E-Switch, Alloc and free unique metadata for match")
Signed-off-by: Vu Pham <vuhuong@mellanox.com>
Reviewed-by: Bodong Wang <bodong@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 .../mellanox/mlx5/core/eswitch_offloads.c     | 51 +++++++++++++++----
 1 file changed, 42 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index 9c740ce73085..3321bb1f188d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -1923,19 +1923,49 @@ static void esw_offloads_vport_metadata_cleanup(struct mlx5_eswitch *esw,
 	mlx5_esw_match_metadata_free(esw, vport->default_metadata);
 }
 
+static void esw_offloads_metadata_uninit(struct mlx5_eswitch *esw)
+{
+	struct mlx5_vport *vport;
+	int i;
+
+	if (!mlx5_eswitch_vport_match_metadata_enabled(esw))
+		return;
+
+	mlx5_esw_for_all_vports_reverse(esw, i, vport)
+		esw_offloads_vport_metadata_cleanup(esw, vport);
+}
+
+static int esw_offloads_metadata_init(struct mlx5_eswitch *esw)
+{
+	struct mlx5_vport *vport;
+	int err;
+	int i;
+
+	if (!mlx5_eswitch_vport_match_metadata_enabled(esw))
+		return 0;
+
+	mlx5_esw_for_all_vports(esw, i, vport) {
+		err = esw_offloads_vport_metadata_setup(esw, vport);
+		if (err)
+			goto metadata_err;
+	}
+
+	return 0;
+
+metadata_err:
+	esw_offloads_metadata_uninit(esw);
+	return err;
+}
+
 int
 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
 				     struct mlx5_vport *vport)
 {
 	int err;
 
-	err = esw_offloads_vport_metadata_setup(esw, vport);
-	if (err)
-		goto metadata_err;
-
 	err = esw_acl_ingress_ofld_setup(esw, vport);
 	if (err)
-		goto ingress_err;
+		return err;
 
 	if (mlx5_eswitch_is_vf_vport(esw, vport->vport)) {
 		err = esw_acl_egress_ofld_setup(esw, vport);
@@ -1947,9 +1977,6 @@ esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
 
 egress_err:
 	esw_acl_ingress_ofld_cleanup(esw, vport);
-ingress_err:
-	esw_offloads_vport_metadata_cleanup(esw, vport);
-metadata_err:
 	return err;
 }
 
@@ -1959,7 +1986,6 @@ esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
 {
 	esw_acl_egress_ofld_cleanup(vport);
 	esw_acl_ingress_ofld_cleanup(esw, vport);
-	esw_offloads_vport_metadata_cleanup(esw, vport);
 }
 
 static int esw_create_uplink_offloads_acl_tables(struct mlx5_eswitch *esw)
@@ -2138,6 +2164,10 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
 	if (esw_use_vport_metadata(esw))
 		esw->flags |= MLX5_ESWITCH_VPORT_MATCH_METADATA;
 
+	err = esw_offloads_metadata_init(esw);
+	if (err)
+		goto err_metadata;
+
 	err = esw_set_passing_vport_metadata(esw, true);
 	if (err)
 		goto err_vport_metadata;
@@ -2170,6 +2200,8 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
 err_steering_init:
 	esw_set_passing_vport_metadata(esw, false);
 err_vport_metadata:
+	esw_offloads_metadata_uninit(esw);
+err_metadata:
 	esw->flags &= ~MLX5_ESWITCH_VPORT_MATCH_METADATA;
 	mlx5_rdma_disable_roce(esw->dev);
 	mutex_destroy(&esw->offloads.termtbl_mutex);
@@ -2204,6 +2236,7 @@ void esw_offloads_disable(struct mlx5_eswitch *esw)
 	esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
 	esw_set_passing_vport_metadata(esw, false);
 	esw_offloads_steering_cleanup(esw);
+	esw_offloads_metadata_uninit(esw);
 	esw->flags &= ~MLX5_ESWITCH_VPORT_MATCH_METADATA;
 	mlx5_rdma_disable_roce(esw->dev);
 	mutex_destroy(&esw->offloads.termtbl_mutex);
-- 
2.26.2


  parent reply	other threads:[~2020-09-15 22:05 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-15 20:25 [pull request][net-next 00/16] mlx5 updates 2020-09-15 saeed
2020-09-15 20:25 ` [net-next 01/16] net/mlx5: Fix uninitialized variable warning saeed
2020-09-15 20:25 ` [net-next 02/16] net/mlx5: remove erroneous fallthrough saeed
2020-09-15 20:25 ` [net-next 03/16] net/mlx5: Always use container_of to find mdev pointer from clock struct saeed
2020-09-15 20:25 ` [net-next 04/16] net/mlx5: Rename ptp clock info saeed
2020-09-15 20:25 ` [net-next 05/16] net/mlx5: Release clock lock before scheduling a PPS work saeed
2020-09-15 20:25 ` [net-next 06/16] net/mlx5: Don't call timecounter cyc2time directly from 1PPS flow saeed
2020-09-15 20:25 ` [net-next 07/16] net/mlx5e: Return a valid errno if can't get lag device index saeed
2020-09-15 20:25 ` [net-next 08/16] net/mlx5e: Add LAG warning for unsupported tx type saeed
2020-09-15 20:25 ` [net-next 09/16] net/mlx5e: Add LAG warning if bond slave is not lag master saeed
2020-09-15 20:25 ` [net-next 10/16] net/mlx5: E-Switch, Check and enable metadata support flag before using saeed
2020-09-15 20:25 ` [net-next 11/16] net/mlx5: E-Switch, Dedicated metadata for uplink vport saeed
2020-09-15 20:25 ` saeed [this message]
2020-09-15 20:25 ` [net-next 13/16] net/mlx5: E-Switch, Use vport metadata matching by default saeed
2020-09-15 20:25 ` [net-next 14/16] net/mlx5e: Add support for tc trap saeed
2020-09-15 20:25 ` [net-next 15/16] net/mlx5e: Add IPv6 traffic class (DSCP) header rewrite support saeed
2020-09-15 20:25 ` [net-next 16/16] net/mlx5e: Add CQE compression support for multi-strides packets saeed
2020-09-16 16:56 ` [pull request][net-next 00/16] mlx5 updates 2020-09-15 Jakub Kicinski
2020-09-17  6:01   ` Saeed Mahameed
2020-09-16 22:18 ` David Miller

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