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From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Lai Jiangshan <jiangshanlai@gmail.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	Lai Jiangshan <laijs@linux.alibaba.com>,
	Yu Zhang <yu.c.zhang@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [RFC PATCH 1/2] kvm/x86: intercept guest changes to X86_CR4_LA57
Date: Mon, 28 Sep 2020 09:24:17 -0700	[thread overview]
Message-ID: <20200928162417.GA28825@linux.intel.com> (raw)
In-Reply-To: <20200928083047.3349-1-jiangshanlai@gmail.com>

On Mon, Sep 28, 2020 at 04:30:46PM +0800, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@linux.alibaba.com>
> 
> When shadowpaping is enabled, guest should not be allowed
> to toggle X86_CR4_LA57. And X86_CR4_LA57 is a rarely changed
> bit, so we can just intercept all the attempts to toggle it
> no matter shadowpaping is in used or not.
> 
> Fixes: fd8cb433734ee ("KVM: MMU: Expose the LA57 feature to VM.")
> Cc: Sean Christopherson <sean.j.christopherson@intel.com>
> Cc: Yu Zhang <yu.c.zhang@linux.intel.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
> ---
>   No test to toggle X86_CR4_LA57 in guest since I can't access to
>   any CPU supports it. Maybe it is not a real problem.

LA57 doesn't need to be intercepted.  It can't be toggled in 64-bit mode
(causes a #GP), and it's ignored in 32-bit mode.  That means LA57 can only
take effect when 64-bit mode is enabled, at which time KVM will update its
MMU context accordingly.

>  arch/x86/kvm/kvm_cache_regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
> index cfe83d4ae625..ca0781b41df9 100644
> --- a/arch/x86/kvm/kvm_cache_regs.h
> +++ b/arch/x86/kvm/kvm_cache_regs.h
> @@ -7,7 +7,7 @@
>  #define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
>  #define KVM_POSSIBLE_CR4_GUEST_BITS				  \
>  	(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR  \
> -	 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_PGE | X86_CR4_TSD)
> +	 | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD)
>  
>  #define BUILD_KVM_GPR_ACCESSORS(lname, uname)				      \
>  static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\
> -- 
> 2.19.1.6.gb485710b
> 

  parent reply	other threads:[~2020-09-28 16:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-28  8:30 [RFC PATCH 1/2] kvm/x86: intercept guest changes to X86_CR4_LA57 Lai Jiangshan
2020-09-28  8:30 ` [RFC PATCH 2/2] kvm/x86: allow guest to toggle X86_CR4_FSGSBASE Lai Jiangshan
2020-09-28 16:24 ` Sean Christopherson [this message]
2020-09-29  5:32   ` [RFC PATCH 1/2] kvm/x86: intercept guest changes to X86_CR4_LA57 Lai Jiangshan
2020-09-29  8:32     ` Sean Christopherson
2020-09-29  8:45       ` Lai Jiangshan

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