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From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] arm64: dbm: Invalidate local TLB when setting TCR_EL1.HD
Date: Thu, 1 Oct 2020 12:12:00 +0100	[thread overview]
Message-ID: <20201001111200.GD21544@gaia> (raw)
In-Reply-To: <20201001110405.18617-1-will@kernel.org>

On Thu, Oct 01, 2020 at 12:04:05PM +0100, Will Deacon wrote:
> TCR_EL1.HD is permitted to be cached in a TLB, so invalidate the local
> TLB after setting the bit when detected support for the feature. Although
> this isn't strictly necessary, since we can happily operate with the bit
> effectively clear, the current code uses an ISB in a half-hearted attempt
> to make the change effective, so let's just fix that up.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Will Deacon <will@kernel.org>

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

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  reply	other threads:[~2020-10-01 11:13 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-01 11:04 [PATCH v2] arm64: dbm: Invalidate local TLB when setting TCR_EL1.HD Will Deacon
2020-10-01 11:12 ` Catalin Marinas [this message]
2020-10-01 11:22 ` Mark Rutland

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