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Priyatharshan" Subject: Re: 12v slot AC Support in x86-power-control Message-ID: <20201008163149.GM6152@heinlein> References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="NqBeRcvybb6C9jMF" Content-Disposition: inline In-Reply-To: X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "openbmc@lists.ozlabs.org" , "ed@tanous.net" , "Velumani T-ERS, HCLTech" , Vijay Khemka Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" --NqBeRcvybb6C9jMF Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Oct 08, 2020 at 01:13:49PM +0000, P. Priyatharshan wrote: > Out platform is multi host system and we have the host as FRU and it can= be plugged in to a slot. The slot has an option to control slot power and = this can be used for a AC cycle. Priyatharshan, I'm still very confused by the word "AC" here. I know your server doesn't have a single joule of AC power on any voltage rail. This server plugs into an OCP rack with a 12V DC bus-bar powering all the servers in the rack. Vijay implemented, for Tiogapass, the 12V system power cycle. This, in hardware, uses the HSC* to remove the server from the bus-bar, which power cycles the entire server including the BMC. This is as if someone physically pulled the server from the rack and then pushed it back in but implemented via the HSC. On the server you are working on, we should have that same design for the "full system power cycle" which interacts with the HSC. This should be done the same way as what Vijay implemented. You also have power control to the multi-host cards which feed 12V to each of the compute cards in your chassis. What I don't understand is why does this also need control of the full 12V and why is it separate =66rom the normal "power on the compute card" sequence? This "power on the compute card" sequence is what is suppose to be modelled by the 'chassisN' objects referenced by others. Can you expand on what the difference is and what functionality you are enabling by having two different slot-level power controls? > We proposed a design to add the slot power control in the x86-power-cont= rol.The earlier discussion can be found in the below link. >=20 > https://lists.ozlabs.org/pipermail/openbmc/2020-August/022481.html * - HSC =3D Hot Swap Controller. --=20 Patrick Williams --NqBeRcvybb6C9jMF Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEBGD9ii4LE9cNbqJBqwNHzC0AwRkFAl9/PvQACgkQqwNHzC0A wRlKsA//SH1EDusLiZwm0u4ZfBp0u2u26fHPBPBs2QWJWV6Rrxh3taLJFEb9yM8L opezZcn7QUSp1CIZOuN/48S8nHLOrNM131e5OrnEC9khtFv00/hHMcUjudEpfi7n 3TdElbAg0KlwfQq9sj1fBBeBfUv8TGeCwireRfxkAbB6hhGxg5SUc5/I7+GeEx8Q eBsZdH9wwXmHVBSA13owywr1NVBnrjVDsoKC6UByEZYNUZyRhP/wp1y03HRnE+/A tjB79ICariJGn/6lfIPfBias5AEOJWf2eZvxLbgEeo+gh+QKkZs6VsaVFba1TtXR b+AloAJb5ag/RNsPGc4L0b2SZ/bV/GspZQx/AQESP/ikgpba8sLTUuqGnObTDcUn 2YiUFTSba8um5z5F49EmdraH3NCxnIgLnrXHpq88tsGZDTlyk9ikhrMKEW+xZ2yQ Fxc5dITihUAUlOSjUn1igpmavhHOWSBVylV/4PHt3q6RExh5V7Ujt15Wm0natb4d plWjjGHh2Xk72iIwIcIqmjSJPI8vUKkJB/rrCYNpeub5N0m40U7rs0xVJuLq4xVM DB3F0tMM/HUmAD/6q9U4uyLcA3DO+wzs7U+jkNJrWSe5BsxXshAHUxB45BmD7mss d/duFLaHs/kMEdpUUc/7b96Ot4YqPf+bn/Ap1+fBMvsElObWfUE= =EsfO -----END PGP SIGNATURE----- --NqBeRcvybb6C9jMF--