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Mon, 12 Oct 2020 05:06:08 -0800 Received: from MTKMBS02N1.mediatek.inc (172.21.101.77) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Oct 2020 05:56:05 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Oct 2020 20:55:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Oct 2020 20:55:57 +0800 From: Shayne Chen To: Felix Fietkau Subject: [PATCH v3 10/10] mt76: mt7915: add support to set tx frequency offset in testmode Date: Mon, 12 Oct 2020 20:54:03 +0800 Message-ID: <20201012125403.8608-10-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201012125403.8608-1-shayne.chen@mediatek.com> References: <20201012125403.8608-1-shayne.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201012_090609_521983_D0221F30 X-CRM114-Status: GOOD ( 13.67 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ryder Lee , Evelyn Tsai , linux-wireless , linux-mediatek , Lorenzo Bianconi , Shayne Chen Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Support to set tx frequency offset in testmode, which is usally used in the pre-calibration stage. Reviewed-by: Ryder Lee Signed-off-by: Shayne Chen --- .../net/wireless/mediatek/mt76/mt7915/mcu.h | 1 + .../wireless/mediatek/mt76/mt7915/testmode.c | 20 +++++++++++++++++++ .../wireless/mediatek/mt76/mt7915/testmode.h | 6 ++++++ 3 files changed, 27 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h index 89453a6..60c5f1b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h @@ -49,6 +49,7 @@ enum { enum { MCU_ATE_SET_TRX = 0x1, MCU_ATE_SET_RX_FILTER = 0x3, + MCU_ATE_SET_FREQ_OFFSET = 0xa, }; struct mt7915_mcu_rxd { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c index 7cfb688..9aedae0 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c @@ -8,6 +8,7 @@ enum { TM_CHANGED_TXPOWER, + TM_CHANGED_FREQ_OFFSET, /* must be last */ NUM_TM_CHANGED @@ -15,6 +16,7 @@ enum { static const u8 tm_change_map[] = { [TM_CHANGED_TXPOWER] = MT76_TM_ATTR_TX_POWER, + [TM_CHANGED_FREQ_OFFSET] = MT76_TM_ATTR_FREQ_OFFSET, }; struct reg_band { @@ -81,6 +83,19 @@ mt7915_tm_set_tx_power(struct mt7915_phy *phy) return ret; } +static int +mt7915_tm_set_freq_offset(struct mt7915_dev *dev, bool en, u32 val) +{ + struct mt7915_tm_cmd req = { + .testmode_en = en, + .param_idx = MCU_ATE_SET_FREQ_OFFSET, + .param.freq.freq_offset = cpu_to_le32(val), + }; + + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_ATE_CTRL, &req, + sizeof(req), false); +} + static int mt7915_tm_mode_ctrl(struct mt7915_dev *dev, bool enable) { @@ -247,6 +262,11 @@ mt7915_tm_set_rx_frames(struct mt7915_dev *dev, bool en) static void mt7915_tm_update_params(struct mt7915_dev *dev, u32 changed) { + struct mt76_testmode_data *td = &dev->mt76.test; + bool en = dev->mt76.test.state != MT76_TM_STATE_OFF; + + if (changed & BIT(TM_CHANGED_FREQ_OFFSET)) + mt7915_tm_set_freq_offset(dev, en, en ? td->freq_offset : 0); if (changed & BIT(TM_CHANGED_TXPOWER)) mt7915_tm_set_tx_power(&dev->phy); } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h index b344a64..39d4d2e 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h @@ -11,6 +11,11 @@ struct mt7915_tm_trx { u8 rsv; }; +struct mt7915_tm_freq_offset { + u8 band; + __le32 freq_offset; +}; + struct mt7915_tm_rx_filter { u8 promiscuous; u8 report_en; @@ -27,6 +32,7 @@ struct mt7915_tm_cmd { union { __le32 data; struct mt7915_tm_trx trx; + struct mt7915_tm_freq_offset freq; struct mt7915_tm_rx_filter filter; u8 test[72]; } param; -- 2.17.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 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bWN1LmgNCkBAIC00OSw2ICs0OSw3IEBAIGVudW0gew0KIGVudW0gew0KIAlNQ1VfQVRFX1NFVF9U UlggPSAweDEsDQogCU1DVV9BVEVfU0VUX1JYX0ZJTFRFUiA9IDB4MywNCisJTUNVX0FURV9TRVRf RlJFUV9PRkZTRVQgPSAweGEsDQogfTsNCiANCiBzdHJ1Y3QgbXQ3OTE1X21jdV9yeGQgew0KZGlm ZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L3Rlc3Rt b2RlLmMgYi9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS90ZXN0bW9k ZS5jDQppbmRleCA3Y2ZiNjg4Li45YWVkYWUwIDEwMDY0NA0KLS0tIGEvZHJpdmVycy9uZXQvd2ly ZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvdGVzdG1vZGUuYw0KKysrIGIvZHJpdmVycy9uZXQv d2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvdGVzdG1vZGUuYw0KQEAgLTgsNiArOCw3IEBA DQogDQogZW51bSB7DQogCVRNX0NIQU5HRURfVFhQT1dFUiwNCisJVE1fQ0hBTkdFRF9GUkVRX09G RlNFVCwNCiANCiAJLyogbXVzdCBiZSBsYXN0ICovDQogCU5VTV9UTV9DSEFOR0VEDQpAQCAtMTUs NiArMTYsNyBAQCBlbnVtIHsNCiANCiBzdGF0aWMgY29uc3QgdTggdG1fY2hhbmdlX21hcFtdID0g ew0KIAlbVE1fQ0hBTkdFRF9UWFBPV0VSXSA9IE1UNzZfVE1fQVRUUl9UWF9QT1dFUiwNCisJW1RN X0NIQU5HRURfRlJFUV9PRkZTRVRdID0gTVQ3Nl9UTV9BVFRSX0ZSRVFfT0ZGU0VULA0KIH07DQog DQogc3RydWN0IHJlZ19iYW5kIHsNCkBAIC04MSw2ICs4MywxOSBAQCBtdDc5MTVfdG1fc2V0X3R4 X3Bvd2VyKHN0cnVjdCBtdDc5MTVfcGh5ICpwaHkpDQogCXJldHVybiByZXQ7DQogfQ0KIA0KK3N0 YXRpYyBpbnQNCittdDc5MTVfdG1fc2V0X2ZyZXFfb2Zmc2V0KHN0cnVjdCBtdDc5MTVfZGV2ICpk ZXYsIGJvb2wgZW4sIHUzMiB2YWwpDQorew0KKwlzdHJ1Y3QgbXQ3OTE1X3RtX2NtZCByZXEgPSB7 DQorCQkudGVzdG1vZGVfZW4gPSBlbiwNCisJCS5wYXJhbV9pZHggPSBNQ1VfQVRFX1NFVF9GUkVR X09GRlNFVCwNCisJCS5wYXJhbS5mcmVxLmZyZXFfb2Zmc2V0ID0gY3B1X3RvX2xlMzIodmFsKSwN CisJfTsNCisNCisJcmV0dXJuIG10NzZfbWN1X3NlbmRfbXNnKCZkZXYtPm10NzYsIE1DVV9FWFRf Q01EX0FURV9DVFJMLCAmcmVxLA0KKwkJCQkgc2l6ZW9mKHJlcSksIGZhbHNlKTsNCit9DQorDQog c3RhdGljIGludA0KIG10NzkxNV90bV9tb2RlX2N0cmwoc3RydWN0IG10NzkxNV9kZXYgKmRldiwg Ym9vbCBlbmFibGUpDQogew0KQEAgLTI0Nyw2ICsyNjIsMTEgQEAgbXQ3OTE1X3RtX3NldF9yeF9m cmFtZXMoc3RydWN0IG10NzkxNV9kZXYgKmRldiwgYm9vbCBlbikNCiBzdGF0aWMgdm9pZA0KIG10 NzkxNV90bV91cGRhdGVfcGFyYW1zKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsIHUzMiBjaGFuZ2Vk KQ0KIHsNCisJc3RydWN0IG10NzZfdGVzdG1vZGVfZGF0YSAqdGQgPSAmZGV2LT5tdDc2LnRlc3Q7 DQorCWJvb2wgZW4gPSBkZXYtPm10NzYudGVzdC5zdGF0ZSAhPSBNVDc2X1RNX1NUQVRFX09GRjsN CisNCisJaWYgKGNoYW5nZWQgJiBCSVQoVE1fQ0hBTkdFRF9GUkVRX09GRlNFVCkpDQorCQltdDc5 MTVfdG1fc2V0X2ZyZXFfb2Zmc2V0KGRldiwgZW4sIGVuID8gdGQtPmZyZXFfb2Zmc2V0IDogMCk7 DQogCWlmIChjaGFuZ2VkICYgQklUKFRNX0NIQU5HRURfVFhQT1dFUikpDQogCQltdDc5MTVfdG1f c2V0X3R4X3Bvd2VyKCZkZXYtPnBoeSk7DQogfQ0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dp cmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L3Rlc3Rtb2RlLmggYi9kcml2ZXJzL25ldC93aXJl bGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS90ZXN0bW9kZS5oDQppbmRleCBiMzQ0YTY0Li4zOWQ0 ZDJlIDEwMDY0NA0KLS0tIGEvZHJpdmVycy9uZXQvd2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5 MTUvdGVzdG1vZGUuaA0KKysrIGIvZHJpdmVycy9uZXQvd2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9t dDc5MTUvdGVzdG1vZGUuaA0KQEAgLTExLDYgKzExLDExIEBAIHN0cnVjdCBtdDc5MTVfdG1fdHJ4 IHsNCiAJdTggcnN2Ow0KIH07DQogDQorc3RydWN0IG10NzkxNV90bV9mcmVxX29mZnNldCB7DQor CXU4IGJhbmQ7DQorCV9fbGUzMiBmcmVxX29mZnNldDsNCit9Ow0KKw0KIHN0cnVjdCBtdDc5MTVf dG1fcnhfZmlsdGVyIHsNCiAJdTggcHJvbWlzY3VvdXM7DQogCXU4IHJlcG9ydF9lbjsNCkBAIC0y Nyw2ICszMiw3IEBAIHN0cnVjdCBtdDc5MTVfdG1fY21kIHsNCiAJdW5pb24gew0KIAkJX19sZTMy IGRhdGE7DQogCQlzdHJ1Y3QgbXQ3OTE1X3RtX3RyeCB0cng7DQorCQlzdHJ1Y3QgbXQ3OTE1X3Rt X2ZyZXFfb2Zmc2V0IGZyZXE7DQogCQlzdHJ1Y3QgbXQ3OTE1X3RtX3J4X2ZpbHRlciBmaWx0ZXI7 DQogCQl1OCB0ZXN0WzcyXTsNCiAJfSBwYXJhbTsNCi0tIA0KMi4xNy4xDQo=