From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0402C433DF for ; Tue, 20 Oct 2020 09:41:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5842E20691 for ; Tue, 20 Oct 2020 09:41:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393063AbgJTJlN (ORCPT ); Tue, 20 Oct 2020 05:41:13 -0400 Received: from mx2.suse.de ([195.135.220.15]:50444 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728462AbgJTJlM (ORCPT ); Tue, 20 Oct 2020 05:41:12 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id E5225AC1D; Tue, 20 Oct 2020 09:41:11 +0000 (UTC) Date: Tue, 20 Oct 2020 11:41:10 +0200 From: Joerg Roedel To: Arvind Sankar Cc: Joerg Roedel , x86@kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Kees Cook , Martin Radev , Tom Lendacky , linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] x86/boot/compressed/64: Check SEV encryption in 64-bit boot-path Message-ID: <20201020094110.GG9328@suse.de> References: <20201019151121.826-1-joro@8bytes.org> <20201019151121.826-4-joro@8bytes.org> <20201019170008.GA2701355@rani.riverdale.lan> <20201019203345.GF3635@8bytes.org> <20201019212247.GA2815942@rani.riverdale.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201019212247.GA2815942@rani.riverdale.lan> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 19, 2020 at 05:22:47PM -0400, Arvind Sankar wrote: > The boot cpu also enables CR4.PGE -- that code is shared between boot > and secondary cpus. The boot cpu jumps to the first "1" label below, > just before the call to sev_verify_cbit you're adding. You are right, in the real kernel image PGE gets enabled early. I added code to save and restore CR4 in sev_verify_cbit() and disable PGE during the test. Thanks, Joerg