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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Try to handle 90/270 degree rotated initial fb
Date: Wed, 21 Oct 2020 16:22:03 +0300	[thread overview]
Message-ID: <20201021132203.GE6112@intel.com> (raw)
In-Reply-To: <160322834765.17091.12161104416937615559@build.alporthouse.com>

On Tue, Oct 20, 2020 at 10:12:27PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2020-10-20 20:43:30)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Do the fb size readout correctly for the 90/270 degree rotated
> > cases. Not sure if we're missing something else as well.
> > 
> > Also no idea whether the BIOS would ever do this.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 22 ++++++++++++--------
> >  1 file changed, 13 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index fd0103f6cc95..183f5d3cd106 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -10604,7 +10604,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
> >         enum pipe pipe;
> >         u32 val, base, offset, stride_mult, tiling, alpha;
> >         int fourcc, pixel_format;
> > -       unsigned int aligned_height;
> > +       unsigned int aligned_height, stride;
> >         struct drm_framebuffer *fb;
> >         struct intel_framebuffer *intel_fb;
> >  
> > @@ -10696,10 +10696,6 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
> >             val & PLANE_CTL_FLIP_HORIZONTAL)
> >                 plane_config->rotation |= DRM_MODE_REFLECT_X;
> >  
> > -       /* 90/270 degree rotation would require extra work */
> > -       if (drm_rotation_90_or_270(plane_config->rotation))
> > -               goto error;
> > -
> >         base = intel_de_read(dev_priv, PLANE_SURF(pipe, plane_id)) & 0xfffff000;
> >         plane_config->base = base;
> >  
> > @@ -10710,10 +10706,18 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
> >         fb->width = ((val >> 0) & 0xffff) + 1;
> >  
> >         val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
> > -       stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
> > -       fb->pitches[0] = (val & 0x3ff) * stride_mult;
> > -
> > -       aligned_height = intel_fb_align_height(fb, 0, fb->height);
> > +       stride_mult = skl_plane_stride_mult(fb, 0, plane_config->rotation);
> > +       stride = (val & 0x3ff) * stride_mult;
> > +
> > +       if (drm_rotation_90_or_270(plane_config->rotation)) {
> > +               swap(fb->width, fb->height);
> > +               fb->pitches[0] = ALIGN(fb->width * fb->format->cpp[0],
> > +                                      intel_fb_stride_alignment(fb, 0));
> > +               aligned_height = stride;
> > +       } else {
> > +               fb->pitches[0] = stride;
> > +               aligned_height = intel_fb_align_height(fb, 0, fb->height);
> > +       }
> 
> Cross check with tiling-y to rule out garbage?

I guess we could do that. Hmm, and we should probably reject Yf because
it has no fence and so seems like it should not even be possible.

> 
> We could also check the stride is suitable for tiling. How much do you
> trust that the registers light up a plane?

The hw stride is specified in tile units (hence the stride_mult).

-- 
Ville Syrjälä
Intel
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Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-10-21 13:22 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-20 19:43 [Intel-gfx] [PATCH 1/2] drm/i915: Reject 90/270 degree rotated initial fbs Ville Syrjala
2020-10-20 19:43 ` [Intel-gfx] [PATCH 2/2] drm/i915: Try to handle 90/270 degree rotated initial fb Ville Syrjala
2020-10-20 21:12   ` Chris Wilson
2020-10-21 13:22     ` Ville Syrjälä [this message]
2020-10-20 20:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Reject 90/270 degree rotated initial fbs Patchwork
2020-10-20 21:09 ` [Intel-gfx] [PATCH 1/2] " Chris Wilson
2020-10-20 23:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] " Patchwork

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