From: Lukas Wunner <lukas@wunner.de>
To: Phil Elwell <phil@raspberrypi.com>
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
Rob Herring <robh@kernel.org>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@broadcom.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS"
<linux-pci@vger.kernel.org>
Subject: Re: [PATCH] PCI: brcmstb: Restore initial fundamental reset
Date: Thu, 12 Nov 2020 17:47:05 +0100 [thread overview]
Message-ID: <20201112164705.GA20154@wunner.de> (raw)
In-Reply-To: <CAMEGJJ12UT5KN6G2-xZ4oHn4Dpj=_k77DW=Hb324HYabUyw4pg@mail.gmail.com>
On Thu, Nov 12, 2020 at 04:42:28PM +0000, Phil Elwell wrote:
> On Thu, 12 Nov 2020 at 16:28, Jim Quinlan <james.quinlan@broadcom.com> wrote:
> > As for me considering that this line is superfluous -- which
> > apparently it is not : AFAIK PERST# is always asserted from cold start
> > on all Brcm STB SOCs, and I expected the same on the RPi. Asserting
> > PERST# at this point in time should be a no-op. Is this not the case?
>
> The reason it isn't superfluous here is that when using USB to boot,
> the Raspberry Pi BCM2711 firmware will already have configured the
> PCIe bus once, so another reset is necessary.
I think that begs the question why the firmware doesn't reset the
PCIe bus before handing over control to the kernel?
Thanks,
Lukas
next prev parent reply other threads:[~2020-11-12 16:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-12 13:14 [PATCH] PCI: brcmstb: Restore initial fundamental reset Phil Elwell
2020-11-12 14:15 ` Nicolas Saenz Julienne
2020-11-12 15:44 ` Florian Fainelli
2020-11-12 16:28 ` Jim Quinlan
2020-11-12 16:42 ` Phil Elwell
2020-11-12 16:47 ` Lukas Wunner [this message]
2020-11-12 17:13 ` Phil Elwell
2020-11-12 17:28 ` Jim Quinlan
2020-11-12 17:32 ` Nicolas Saenz Julienne
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