From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81E69C388F9 for ; Thu, 19 Nov 2020 08:37:53 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F70E246B0 for ; Thu, 19 Nov 2020 08:37:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="2nO6NjgN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F70E246B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sina.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sHnSBKvblSWF27wdeyekD5Xy12tUUiOlhN4q4kCuYCU=; b=2nO6NjgNU9FwwIRmgorPUpTlA +aJrI6o4HHeBQ5mb/gALle1apZiidoPOgp8cHymDI6f+c7P3Pv8WOsnt7Tt3bX6969unXNdu2bT4G q/NmtKCwGNgK7PNr1ZFF2oUX7P+L6ZxilzHWdBQ5r9Jwre4lASK1Q6SX0PRkKa8HhvNhUpQJksy2J 2e4XBhLNwcckle5lJzXmcfywncICz18+qTRZrk74Yq3YXP+xxY5YyfTJvfiMYSWfZMlf2Q2fUIFsH slooqruhE2hIQZ6Mja21HXmBQEV6cw7LZlORm6pMDwvqK42h9OUsvQF1yT5oAnX07nv/JhxyPownh eFLr3MwYQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kffRL-0007vD-Uo; Thu, 19 Nov 2020 08:37:16 +0000 Received: from r3-25.sinamail.sina.com.cn ([202.108.3.25]) by merlin.infradead.org with smtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kffRF-0007tg-MO for linux-arm-kernel@lists.infradead.org; Thu, 19 Nov 2020 08:37:13 +0000 Received: from unknown (HELO localhost.localdomain)([103.193.190.174]) by sina.com with ESMTP id 5FB62EA50002024B; Thu, 19 Nov 2020 16:36:54 +0800 (CST) X-Sender: hdanton@sina.com X-Auth-ID: hdanton@sina.com X-SMAIL-MID: 76452954919670 From: Hillf Danton To: Wendy Liang Subject: Re: [PATCH v2 9/9] misc: xilinx-ai-engine: Add support for servicing error interrupts Date: Thu, 19 Nov 2020 16:36:45 +0800 Message-Id: <20201119083645.544-1-hdanton@sina.com> In-Reply-To: <1605743289-26575-10-git-send-email-wendy.liang@xilinx.com> References: <1605743289-26575-1-git-send-email-wendy.liang@xilinx.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201119_033710_673735_748939A4 X-CRM114-Status: GOOD ( 12.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arnd@arndb.de, gregkh@linuxfoundation.org, michal.simek@xilinx.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, Nishad Saraf , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 18 Nov 2020 15:48:09 -0800 Wendy Liang wrote: > +/** > + * aie_interrupt() - interrupt handler for AIE. > + * @irq: Interrupt number. > + * @data: AI engine device structure. > + * @return: IRQ_HANDLED. > + * > + * This thread function disables level 2 interrupt controllers and schedules a > + * task in workqueue to backtrack the source of error interrupt. Disabled > + * interrupts are re-enabled after successful completion of bottom half. > + */ > +irqreturn_t aie_interrupt(int irq, void *data) > +{ > + struct aie_device *adev = data; > + struct aie_partition *apart; > + int ret; > + bool sched_work = false; > + > + ret = mutex_lock_interruptible(&adev->mlock); > + if (ret) { > + dev_err(&adev->dev, > + "Failed to acquire lock. Process was interrupted by fatal signals\n"); > + return IRQ_NONE; > + } > + > + list_for_each_entry(apart, &adev->partitions, node) { > + struct aie_location loc; > + u32 ttype, l2_mask, l2_status, l2_bitmap_offset = 0; > + > + ret = mutex_lock_interruptible(&apart->mlock); > + if (ret) { > + dev_err(&apart->dev, > + "Failed to acquire lock. Process was interrupted by fatal signals\n"); > + return IRQ_NONE; Though quite unlikely, you need to release adev->mlock before going home. > + } > + > + for (loc.col = apart->range.start.col, loc.row = 0; > + loc.col < apart->range.start.col + apart->range.size.col; > + loc.col++) { > + ttype = apart->adev->ops->get_tile_type(&loc); > + if (ttype != AIE_TILE_TYPE_SHIMNOC) > + continue; > + > + l2_mask = aie_get_l2_mask(apart, &loc); > + if (l2_mask) { > + aie_resource_cpy_from_arr32(&apart->l2_mask, > + l2_bitmap_offset * > + 32, &l2_mask, 32); > + aie_disable_l2_ctrl(apart, &loc, l2_mask); > + } > + l2_bitmap_offset++; > + > + l2_status = aie_get_l2_status(apart, &loc); > + if (l2_status) { > + aie_clear_l2_intr(apart, &loc, l2_status); > + sched_work = true; > + } else { > + aie_enable_l2_ctrl(apart, &loc, l2_mask); > + } > + } > + mutex_unlock(&apart->mlock); > + } > + > + /* For ES1 silicon, interrupts are latched in NPI */ > + if (adev->version == VERSAL_ES1_REV_ID) { > + ret = zynqmp_pm_clear_aie_npi_isr(adev->pm_node_id, > + AIE_NPI_ERROR_ID); > + if (ret < 0) > + dev_err(&adev->dev, "Failed to clear NPI ISR\n"); > + } > + > + mutex_unlock(&adev->mlock); > + > + if (sched_work) > + schedule_work(&adev->backtrack); > + > + return IRQ_HANDLED; > +} _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel