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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [v9 09/12] drm/i915/display: Implement DRM infoframe read for LSPCON
Date: Wed, 25 Nov 2020 18:50:28 +0200	[thread overview]
Message-ID: <20201125165028.GX6112@intel.com> (raw)
In-Reply-To: <20201103152834.12727-10-uma.shankar@intel.com>

On Tue, Nov 03, 2020 at 08:58:31PM +0530, Uma Shankar wrote:
> Implement Read back of HDR metadata infoframes i.e Dynamic Range
> and Mastering Infoframe for LSPCON devices.
> 
> v2: Added proper bitmask of enabled infoframes as per Ville's
> recommendation.
> 
> v3: Dropped a redundant wrapper as per Ville's comment.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c   | 7 +++----
>  drivers/gpu/drm/i915/display/intel_lspcon.c | 7 ++++++-
>  drivers/gpu/drm/i915/display/intel_lspcon.h | 4 ++++
>  3 files changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index f1a927cdf798..81dabffbb3e6 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -555,10 +555,9 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
>  	intel_de_posting_read(dev_priv, ctl_reg);
>  }
>  
> -static void hsw_read_infoframe(struct intel_encoder *encoder,
> -			       const struct intel_crtc_state *crtc_state,
> -			       unsigned int type,
> -			       void *frame, ssize_t len)
> +void hsw_read_infoframe(struct intel_encoder *encoder,
> +			const struct intel_crtc_state *crtc_state,
> +			unsigned int type, void *frame, ssize_t len)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index d83e1d220658..8a4fd8ca8016 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -486,7 +486,12 @@ void lspcon_read_infoframe(struct intel_encoder *encoder,
>  			   unsigned int type,
>  			   void *frame, ssize_t len)
>  {
> -	/* FIXME implement this */
> +	/* FIXME implement for AVI Infoframe as well */
> +	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA) {
> +		drm_dbg_kms(encoder->base.dev, "Read HDR metadata for lspcon\n");

Looks like pointless noise in debug logs.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +		hsw_read_infoframe(encoder, crtc_state, type,
> +				   frame, len);
> +	}
>  }
>  
>  void lspcon_set_infoframes(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
> index 42ccb21c908f..d622156d0c4e 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.h
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
> @@ -37,5 +37,9 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
>  			 const struct intel_crtc_state *crtc_state,
>  			 unsigned int type,
>  			 const void *frame, ssize_t len);
> +void hsw_read_infoframe(struct intel_encoder *encoder,
> +			const struct intel_crtc_state *crtc_state,
> +			unsigned int type,
> +			void *frame, ssize_t len);
>  
>  #endif /* __INTEL_LSPCON_H__ */
> -- 
> 2.26.2

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2020-11-25 16:50 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-03 15:28 [Intel-gfx] [v9 00/12] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-03 15:28 ` [Intel-gfx] [v9 01/12] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-25 16:30   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 02/12] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-25 16:37   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-11-04  7:30   ` [Intel-gfx] [v10 " Uma Shankar
2020-11-25 16:36     ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 04/12] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-25 16:29   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 05/12] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-11-25 16:29   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 06/12] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-11-25 16:40   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 07/12] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-25 16:42   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 08/12] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-25 16:46   ` Ville Syrjälä
2020-11-03 15:28 ` [Intel-gfx] [v9 09/12] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-25 16:50   ` Ville Syrjälä [this message]
2020-11-03 15:28 ` [Intel-gfx] [v9 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-25 16:56   ` Ville Syrjälä
2020-11-26  7:45     ` Shankar, Uma
2020-11-03 15:28 ` [Intel-gfx] [v9 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-03 15:28 ` [Intel-gfx] [v9 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-03 15:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev9) Patchwork
2020-11-03 15:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-03 16:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-04  7:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev10) Patchwork
2020-11-04  7:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-04  7:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-04  9:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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