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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH] drm/bridge: ti-sn65dsi86: Implement the pwm_chip
Date: Tue, 08 Dec 2020 13:29:24 +0800	[thread overview]
Message-ID: <202012081319.7n384Wcx-lkp@intel.com> (raw)
In-Reply-To: <20201208044022.972872-1-bjorn.andersson@linaro.org>

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Hi Bjorn,

I love your patch! Yet something to improve:

[auto build test ERROR on next-20201207]
[cannot apply to linus/master v5.10-rc7 v5.10-rc6 v5.10-rc5 v5.10-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Bjorn-Andersson/drm-bridge-ti-sn65dsi86-Implement-the-pwm_chip/20201208-124632
base:    15ac8fdb74403772780be1a8c4f7c1eff1040fc4
config: i386-randconfig-s002-20201208 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-179-ga00755aa-dirty
        # https://github.com/0day-ci/linux/commit/349c88e420ead9bf6dca594f68a81d58fd6ffff9
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Bjorn-Andersson/drm-bridge-ti-sn65dsi86-Implement-the-pwm_chip/20201208-124632
        git checkout 349c88e420ead9bf6dca594f68a81d58fd6ffff9
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/bridge/ti-sn65dsi86.c: In function 'ti_sn_pwm_apply':
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:1095:15: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
    1095 |  pwm_en_inv = FIELD_PREP(BIT(1), !!state->enabled) |
         |               ^~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/FIELD_PREP +1095 drivers/gpu/drm/bridge/ti-sn65dsi86.c

  1037	
  1038	static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  1039				   const struct pwm_state *state)
  1040	{
  1041		struct ti_sn_bridge *pdata = pwm_chip_to_ti_sn_bridge(chip);
  1042		unsigned int pwm_en_inv;
  1043		unsigned int backlight;
  1044		unsigned int pwm_freq;
  1045		unsigned int pre_div;
  1046		unsigned int scale;
  1047		int ret;
  1048	
  1049		if (!pdata->pwm_enabled) {
  1050			ret = pm_runtime_get_sync(pdata->dev);
  1051			if (ret < 0)
  1052				return ret;
  1053	
  1054			ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG,
  1055						 SN_GPIO_MUX_MASK << (2 * SN_PWM_GPIO),
  1056						 SN_GPIO_MUX_SPECIAL << (2 * SN_PWM_GPIO));
  1057			if (ret) {
  1058				dev_err(pdata->dev, "failed to mux in PWM function\n");
  1059				goto out;
  1060			}
  1061		}
  1062	
  1063		if (state->enabled) {
  1064			/*
  1065			 * Per the datasheet the PWM frequency is given by:
  1066			 *
  1067			 * PWM_FREQ = REFCLK_FREQ / (PWM_PRE_DIV * BACKLIGHT_SCALE + 1)
  1068			 *
  1069			 * In order to find the PWM_FREQ that best suits the requested
  1070			 * state->period, the PWM_PRE_DIV is calculated with the
  1071			 * maximum possible number of steps (BACKLIGHT_SCALE_MAX). The
  1072			 * actual BACKLIGHT_SCALE is then adjusted down to match the
  1073			 * requested period.
  1074			 *
  1075			 * The BACKLIGHT value is then calculated against the
  1076			 * BACKLIGHT_SCALE, based on the requested duty_cycle and
  1077			 * period.
  1078			 */
  1079			pwm_freq = NSEC_PER_SEC / state->period;
  1080			pre_div = DIV_ROUND_UP(pdata->pwm_refclk / pwm_freq - 1, BACKLIGHT_SCALE_MAX);
  1081			scale = (pdata->pwm_refclk / pwm_freq - 1) / pre_div;
  1082	
  1083			backlight = scale * state->duty_cycle / state->period;
  1084	
  1085			ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div);
  1086			if (ret) {
  1087				dev_err(pdata->dev, "failed to update PWM_PRE_DIV\n");
  1088				goto out;
  1089			}
  1090	
  1091			ti_sn_bridge_write_u16(pdata, SN_BACKLIGHT_SCALE_REG, scale);
  1092			ti_sn_bridge_write_u16(pdata, SN_BACKLIGHT_REG, backlight);
  1093		}
  1094	
> 1095		pwm_en_inv = FIELD_PREP(BIT(1), !!state->enabled) |
  1096			     FIELD_PREP(BIT(0), state->polarity == PWM_POLARITY_INVERSED);
  1097		ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv);
  1098		if (ret) {
  1099			dev_err(pdata->dev, "failed to update PWM_EN/PWM_INV\n");
  1100			goto out;
  1101		}
  1102	
  1103		pdata->pwm_enabled = !!state->enabled;
  1104	out:
  1105	
  1106		if (!pdata->pwm_enabled)
  1107			pm_runtime_put_sync(pdata->dev);
  1108	
  1109		return ret;
  1110	}
  1111	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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  reply	other threads:[~2020-12-08  5:29 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-08  4:40 [PATCH] drm/bridge: ti-sn65dsi86: Implement the pwm_chip Bjorn Andersson
2020-12-08  4:40 ` Bjorn Andersson
2020-12-08  5:29 ` kernel test robot [this message]
2020-12-08  6:51 ` kernel test robot
2020-12-08  8:04 ` Uwe Kleine-König
2020-12-08  8:04   ` Uwe Kleine-König
2020-12-09 21:47   ` Bjorn Andersson
2020-12-09 21:47     ` Bjorn Andersson
2020-12-10  1:51 ` Shawn Guo
2020-12-10  1:51   ` Shawn Guo
2020-12-10  4:00   ` Bjorn Andersson
2020-12-10  4:00     ` Bjorn Andersson
2020-12-10 13:04   ` Uwe Kleine-König
2020-12-10 13:04     ` Uwe Kleine-König
2020-12-10 14:40     ` Shawn Guo
2020-12-10 14:40       ` Shawn Guo
2020-12-10 17:43       ` Uwe Kleine-König
2020-12-10 17:43         ` Uwe Kleine-König

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