From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10E38C4361B for ; Tue, 8 Dec 2020 20:23:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCA7B23A79 for ; Tue, 8 Dec 2020 20:23:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BCA7B23A79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 570116E9BC; Tue, 8 Dec 2020 20:23:52 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id A40916E9BC; Tue, 8 Dec 2020 20:23:51 +0000 (UTC) IronPort-SDR: gBJ8lZAuEftLi7GQTl2B0eKFid99qISxhUHdrGxW+Q/1sO45PVMTVTwA8ICx7ojWJU9gjOVy/Z kl4l4Bg+gYYQ== X-IronPort-AV: E=McAfee;i="6000,8403,9829"; a="192258253" X-IronPort-AV: E=Sophos;i="5.78,403,1599548400"; d="scan'208";a="192258253" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2020 12:23:51 -0800 IronPort-SDR: KBjJmrQAuRGgEFkxdqJn3AvCDGFegmSjJu/tItZ+Tj5EnmxMwbGitgSnMnhLrImvvZLvSdzf9o GdDHdCN4sAog== X-IronPort-AV: E=Sophos;i="5.78,403,1599548400"; d="scan'208";a="363804342" Received: from labuser-z97x-ud5h.jf.intel.com (HELO labuser-Z97X-UD5H) ([10.165.21.211]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2020 12:23:51 -0800 Date: Tue, 8 Dec 2020 12:26:59 -0800 From: "Navare, Manasi" To: Jani Nikula Message-ID: <20201208202659.GD474@labuser-Z97X-UD5H> References: <43fba75d89525413aed0bdbb082c26b09458bd46.1607429866.git.jani.nikula@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <43fba75d89525413aed0bdbb082c26b09458bd46.1607429866.git.jani.nikula@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915/bios: fill in DSC rc_model_size from VBT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Dec 08, 2020 at 02:33:54PM +0200, Jani Nikula wrote: > The VBT fields match the DPCD data, so use the same helper. > > Cc: Manasi Navare > Cc: Vandita Kulkarni > Signed-off-by: Jani Nikula Only for DSI so far right? In that case looks good Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_bios.c | 11 +++-------- > 1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index 4cc949b228f2..06c3310446a2 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -2555,16 +2555,11 @@ static void fill_dsc(struct intel_crtc_state *crtc_state, > crtc_state->dsc.slice_count); > > /* > - * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the > - * implementation specific physical rate buffer size. Currently we use > - * the required rate buffer model size calculated in > - * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. > - * > * The VBT rc_buffer_block_size and rc_buffer_size definitions > - * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC > - * implementation should also use the DPCD (or perhaps VBT for eDP) > - * provided value for the buffer size. > + * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. > */ > + vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, > + dsc->rc_buffer_size); > > /* FIXME: DSI spec says bpc + 1 for this one */ > vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); > -- > 2.20.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B14DC433FE for ; Tue, 8 Dec 2020 20:23:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E07BF23A79 for ; Tue, 8 Dec 2020 20:23:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E07BF23A79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9226E6E9BD; Tue, 8 Dec 2020 20:23:52 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id A40916E9BC; Tue, 8 Dec 2020 20:23:51 +0000 (UTC) IronPort-SDR: gBJ8lZAuEftLi7GQTl2B0eKFid99qISxhUHdrGxW+Q/1sO45PVMTVTwA8ICx7ojWJU9gjOVy/Z kl4l4Bg+gYYQ== X-IronPort-AV: E=McAfee;i="6000,8403,9829"; a="192258253" X-IronPort-AV: E=Sophos;i="5.78,403,1599548400"; d="scan'208";a="192258253" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2020 12:23:51 -0800 IronPort-SDR: KBjJmrQAuRGgEFkxdqJn3AvCDGFegmSjJu/tItZ+Tj5EnmxMwbGitgSnMnhLrImvvZLvSdzf9o GdDHdCN4sAog== X-IronPort-AV: E=Sophos;i="5.78,403,1599548400"; d="scan'208";a="363804342" Received: from labuser-z97x-ud5h.jf.intel.com (HELO labuser-Z97X-UD5H) ([10.165.21.211]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2020 12:23:51 -0800 Date: Tue, 8 Dec 2020 12:26:59 -0800 From: "Navare, Manasi" To: Jani Nikula Subject: Re: [PATCH 5/6] drm/i915/bios: fill in DSC rc_model_size from VBT Message-ID: <20201208202659.GD474@labuser-Z97X-UD5H> References: <43fba75d89525413aed0bdbb082c26b09458bd46.1607429866.git.jani.nikula@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <43fba75d89525413aed0bdbb082c26b09458bd46.1607429866.git.jani.nikula@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vandita Kulkarni , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, Dec 08, 2020 at 02:33:54PM +0200, Jani Nikula wrote: > The VBT fields match the DPCD data, so use the same helper. > > Cc: Manasi Navare > Cc: Vandita Kulkarni > Signed-off-by: Jani Nikula Only for DSI so far right? In that case looks good Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_bios.c | 11 +++-------- > 1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index 4cc949b228f2..06c3310446a2 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -2555,16 +2555,11 @@ static void fill_dsc(struct intel_crtc_state *crtc_state, > crtc_state->dsc.slice_count); > > /* > - * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the > - * implementation specific physical rate buffer size. Currently we use > - * the required rate buffer model size calculated in > - * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. > - * > * The VBT rc_buffer_block_size and rc_buffer_size definitions > - * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC > - * implementation should also use the DPCD (or perhaps VBT for eDP) > - * provided value for the buffer size. > + * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. > */ > + vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, > + dsc->rc_buffer_size); > > /* FIXME: DSI spec says bpc + 1 for this one */ > vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); > -- > 2.20.1 > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel