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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s139sm392160oih.10.2020.12.09.08.32.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Dec 2020 08:32:42 -0800 (PST) Received: (nullmailer pid 565478 invoked by uid 1000); Wed, 09 Dec 2020 16:32:40 -0000 Date: Wed, 9 Dec 2020 10:32:40 -0600 From: Rob Herring To: conor.dooley@microchip.com Subject: Re: [PATCH v2 2/5] dt-bindings: add bindings for polarfire soc mailbox Message-ID: <20201209163240.GA565400@robh.at.kernel.org> References: <20201201110250.28437-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201201110250.28437-1-conor.dooley@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201209_113248_098648_F88A6162 X-CRM114-Status: UNSURE ( 9.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, damien.lemoal@wdc.com, aou@eecs.berkeley.edu, cyril.jean@microchip.com, david.abdurachmanov@gmail.com, daire.mcnamara@microchip.com, anup.patel@wdc.com, jassisinghbrar@gmail.com, atish.patra@wdc.com, robh+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, lewis.hanly@microchip.com, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, 01 Dec 2020 11:02:50 +0000, conor.dooley@microchip.com wrote: > From: Conor Dooley > > Add device tree bindings for the MSS system controller mailbox on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley > --- > .../mailbox/microchip,mpfs-mailbox.yaml | 47 +++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > Reviewed-by: Rob Herring _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41D7BC433FE for ; Wed, 9 Dec 2020 16:33:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04D3222BF5 for ; Wed, 9 Dec 2020 16:33:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728121AbgLIQdY (ORCPT ); Wed, 9 Dec 2020 11:33:24 -0500 Received: from mail-ot1-f68.google.com ([209.85.210.68]:40506 "EHLO mail-ot1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727024AbgLIQdY (ORCPT ); Wed, 9 Dec 2020 11:33:24 -0500 Received: by mail-ot1-f68.google.com with SMTP id j12so1931641ota.7 for ; Wed, 09 Dec 2020 08:33:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=dCuMs4GSdwg3rvAHN9LxlH1LO/M24Tt6rfO3ld6+4c8=; b=OGCTbzjs7H64Jvrf7PxSS9wsLPNTRqwDTiEyhWVmfI+2wk6zYlwI279zsISlB1MoqJ zwAXIS/ro0V7jf9/DXwSCB7PuQrhYCXOdsoB7hlLP5MXLS11HaZfcyE+uJYQZTBrImaL hRWwXpAp9CFt3uzxeeV7RPYum4D9GIcO8LN02Ntkp+VNwuXFF498e0oPpDVimxqa392V FelTfyRMszNyv2zidsFz/aYya4EhCZsOKhV+125+XN/E9IrcZr/iOfw1oeaQAGbDZZ4m ErI3MkhXdFgi3/XDNL2uM5Rg4XfbgyAkUnEDWSkjr1sAOSiGwB3P2pgM7a+dj+QBbv2w ilCQ== X-Gm-Message-State: AOAM533KnWJnf+cF264kjotfTTPJZeRFnVU9xb60xOHFg8ogPnuppm5f epnUU+UoI2xyNL+P0ZwYqg== X-Google-Smtp-Source: ABdhPJz0sGQupY3l4nBeRGwudmV+CVNHqh7oLdIK5VeM+7vSRXo8s/xl4mFlcUkdMH/XBw2CdWQAkg== X-Received: by 2002:a9d:6b99:: with SMTP id b25mr2509695otq.49.1607531563308; Wed, 09 Dec 2020 08:32:43 -0800 (PST) Received: from xps15 (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id s139sm392160oih.10.2020.12.09.08.32.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Dec 2020 08:32:42 -0800 (PST) Received: (nullmailer pid 565478 invoked by uid 1000); Wed, 09 Dec 2020 16:32:40 -0000 Date: Wed, 9 Dec 2020 10:32:40 -0600 From: Rob Herring To: conor.dooley@microchip.com Cc: cyril.jean@microchip.com, daire.mcnamara@microchip.com, robh+dt@kernel.org, damien.lemoal@wdc.com, anup.patel@wdc.com, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, david.abdurachmanov@gmail.com, lewis.hanly@microchip.com, atish.patra@wdc.com, jassisinghbrar@gmail.com, palmer@dabbelt.com Subject: Re: [PATCH v2 2/5] dt-bindings: add bindings for polarfire soc mailbox Message-ID: <20201209163240.GA565400@robh.at.kernel.org> References: <20201201110250.28437-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201201110250.28437-1-conor.dooley@microchip.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 01 Dec 2020 11:02:50 +0000, conor.dooley@microchip.com wrote: > From: Conor Dooley > > Add device tree bindings for the MSS system controller mailbox on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley > --- > .../mailbox/microchip,mpfs-mailbox.yaml | 47 +++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > Reviewed-by: Rob Herring