From: Uros Bizjak <ubizjak@gmail.com>
To: x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Uros Bizjak <ubizjak@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: [PATCH 3/3] KVM/VMX: Use try_cmpxchg64() in posted_intr.c
Date: Tue, 15 Dec 2020 19:28:05 +0100 [thread overview]
Message-ID: <20201215182805.53913-4-ubizjak@gmail.com> (raw)
In-Reply-To: <20201215182805.53913-1-ubizjak@gmail.com>
Use try_cmpxchg64() instead of cmpxchg64() to reuse flags from
cmpxchg/cmpxchg8b instruction. For 64 bit targets flags reuse
avoids a CMP instruction, while for 32 bit targets flags reuse
avoids XOR/XOR/OR instruction sequence.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Wanpeng Li <wanpengli@tencent.com>
Cc: Jim Mattson <jmattson@google.com>
Cc: Joerg Roedel <joro@8bytes.org>
---
arch/x86/kvm/vmx/posted_intr.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c
index f02962dcc72c..47b47970fb46 100644
--- a/arch/x86/kvm/vmx/posted_intr.c
+++ b/arch/x86/kvm/vmx/posted_intr.c
@@ -60,8 +60,7 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
new.ndst = (dest << 8) & 0xFF00;
new.sn = 0;
- } while (cmpxchg64(&pi_desc->control, old.control,
- new.control) != old.control);
+ } while (!try_cmpxchg64(&pi_desc->control, &old.control, new.control));
after_clear_sn:
@@ -111,8 +110,7 @@ static void __pi_post_block(struct kvm_vcpu *vcpu)
/* set 'NV' to 'notification vector' */
new.nv = POSTED_INTR_VECTOR;
- } while (cmpxchg64(&pi_desc->control, old.control,
- new.control) != old.control);
+ } while (!try_cmpxchg64(&pi_desc->control, &old.control, new.control));
if (!WARN_ON_ONCE(vcpu->pre_pcpu == -1)) {
spin_lock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu));
@@ -181,8 +179,7 @@ int pi_pre_block(struct kvm_vcpu *vcpu)
/* set 'NV' to 'wakeup vector' */
new.nv = POSTED_INTR_WAKEUP_VECTOR;
- } while (cmpxchg64(&pi_desc->control, old.control,
- new.control) != old.control);
+ } while (!try_cmpxchg64(&pi_desc->control, &old.control, new.control));
/* We should not block the vCPU if an interrupt is posted for it. */
if (pi_test_on(pi_desc) == 1)
--
2.26.2
next prev parent reply other threads:[~2020-12-15 18:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-15 18:28 [PATCH 0/3] x86/KVM/VMX: Introduce and use try_cmpxchg64() Uros Bizjak
2020-12-15 18:28 ` [PATCH 1/3] asm-generic/atomic: Add try_cmpxchg64() instrumentation Uros Bizjak
2020-12-15 18:28 ` [PATCH 2/3] locking/atomic/x86: Introduce arch_try_cmpxchg64() Uros Bizjak
2020-12-15 20:08 ` Uros Bizjak
2020-12-16 15:37 ` kernel test robot
2020-12-16 15:37 ` kernel test robot
2020-12-15 18:28 ` Uros Bizjak [this message]
2021-01-15 19:28 ` [PATCH 3/3] KVM/VMX: Use try_cmpxchg64() in posted_intr.c Sean Christopherson
2021-01-15 18:09 ` [PATCH 0/3] x86/KVM/VMX: Introduce and use try_cmpxchg64() Sean Christopherson
2021-01-18 18:26 ` Paolo Bonzini
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