From: Eduardo Habkost <ehabkost@redhat.com>
To: Cathy Zhang <cathy.zhang@intel.com>
Cc: pbonzini@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] x86/cpu: Add AVX512_FP16 cpu feature
Date: Wed, 16 Dec 2020 15:00:30 -0500 [thread overview]
Message-ID: <20201216200030.GH3140057@habkost.net> (raw)
In-Reply-To: <20201216224002.32677-1-cathy.zhang@intel.com>
On Thu, Dec 17, 2020 at 06:40:02AM +0800, Cathy Zhang wrote:
> AVX512 Half-precision floating point (FP16) has better performance
> compared to FP32 if the presicion or magnitude requirements are met.
> It's defined as CPUID.(EAX=7,ECX=0):EDX[bit 23].
>
> Refer to
> https://software.intel.com/content/www/us/en/develop/download/\
> intel-architecture-instruction-set-extensions-programming-reference.html
>
> Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
Queued, thanks!
--
Eduardo
prev parent reply other threads:[~2020-12-16 20:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-16 22:40 [PATCH] x86/cpu: Add AVX512_FP16 cpu feature Cathy Zhang
2020-12-16 16:19 ` Christophe de Dinechin
2020-12-16 20:00 ` Eduardo Habkost [this message]
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