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Fri, 18 Dec 2020 11:09:13 -0800 (PST) Date: Fri, 18 Dec 2020 19:09:11 +0000 From: Lee Jones To: Jason Gunthorpe Subject: Re: [resend/standalone PATCH v4] Add auxiliary bus support Message-ID: <20201218190911.GT207743@dell> References: <20201217211937.GA3177478@piout.net> <20201218131709.GA5333@sirena.org.uk> <20201218140854.GW552508@nvidia.com> <20201218155204.GC5333@sirena.org.uk> <20201218162817.GX552508@nvidia.com> <20201218180310.GD5333@sirena.org.uk> <20201218184150.GY552508@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20201218184150.GY552508@nvidia.com> Cc: Alexandre Belloni , Linux Kernel Mailing List , Kiran Patil , Liam Girdwood , linux-rdma , Greg KH , Martin Habets , alsa-devel@alsa-project.org, Pierre-Louis Bossart , Fred Oh , Mark Brown , Ranjani Sridharan , Parav Pandit , Jakub Kicinski , Dave Ertman , Dan Williams , Shiraz Saleem , Netdev , Leon Romanovsky , David Miller X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Fri, 18 Dec 2020, Jason Gunthorpe wrote: > On Fri, Dec 18, 2020 at 06:03:10PM +0000, Mark Brown wrote: > > On Fri, Dec 18, 2020 at 12:28:17PM -0400, Jason Gunthorpe wrote: > > > On Fri, Dec 18, 2020 at 03:52:04PM +0000, Mark Brown wrote: > > > > On Fri, Dec 18, 2020 at 10:08:54AM -0400, Jason Gunthorpe wrote: > > > > > > > I thought the recent LWN article summed it up nicely, auxillary bus is > > > > > for gluing to subsystems together using a driver specific software API > > > > > to connect to the HW, MFD is for splitting a physical HW into disjoint > > > > > regions of HW. > > > > > > This conflicts with the statements from Greg about not using the > > > > platform bus for things that aren't memory mapped or "direct firmware", > > > > a large proportion of MFD subfunctions are neither at least in so far as > > > > I can understand what direct firmware means. > > > > > I assume MFD will keep existing and it will somehow stop using > > > platform device for the children it builds. > > > > If it's not supposed to use platform devices so I'm assuming that the > > intention is that it should use aux devices, otherwise presumably it'd > > be making some new clone of the platform bus but I've not seen anyone > > suggesting this. > > I wouldn't assume that, I certainly don't want to see all the HW > related items in platform_device cloned roughly into aux device. > > I've understood the bus type should be basically related to the thing > that is creating the device. In a clean view platform code creates > platform devices. DT should create DT devices, ACPI creates ACPI > devices, PNP does pnp devices, etc > > So, I strongly suspect, MFD should create mfd devices on a MFD bus > type. > > Alexandre's point is completely valid, and I think is the main > challenge here, somehow avoiding duplication. > > If we were to look at it with some OOP viewpoint I'd say the generic > HW resource related parts should be some shared superclass between > 'struct device' and 'struct platform/pnp/pci/acpi/mfd/etc_device'. You're confusing things here. ACPI, DT and MFD are not busses. They are just methods to describe/register devices which will operate on buses. Busses include things like; I2C, SPI, PCI, USB and Platform (MMIO). -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFD5DC2BBD5 for ; Fri, 18 Dec 2020 19:10:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8D0F523B8A for ; Fri, 18 Dec 2020 19:10:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726822AbgLRTJ5 (ORCPT ); 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Fri, 18 Dec 2020 11:09:13 -0800 (PST) Date: Fri, 18 Dec 2020 19:09:11 +0000 From: Lee Jones To: Jason Gunthorpe Cc: Mark Brown , Greg KH , Alexandre Belloni , Dan Williams , Pierre-Louis Bossart , alsa-devel@alsa-project.org, Kiran Patil , linux-rdma , Shiraz Saleem , Martin Habets , Liam Girdwood , Ranjani Sridharan , Fred Oh , Dave Ertman , Jakub Kicinski , Netdev , Leon Romanovsky , David Miller , Linux Kernel Mailing List , Parav Pandit Subject: Re: [resend/standalone PATCH v4] Add auxiliary bus support Message-ID: <20201218190911.GT207743@dell> References: <20201217211937.GA3177478@piout.net> <20201218131709.GA5333@sirena.org.uk> <20201218140854.GW552508@nvidia.com> <20201218155204.GC5333@sirena.org.uk> <20201218162817.GX552508@nvidia.com> <20201218180310.GD5333@sirena.org.uk> <20201218184150.GY552508@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20201218184150.GY552508@nvidia.com> Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org On Fri, 18 Dec 2020, Jason Gunthorpe wrote: > On Fri, Dec 18, 2020 at 06:03:10PM +0000, Mark Brown wrote: > > On Fri, Dec 18, 2020 at 12:28:17PM -0400, Jason Gunthorpe wrote: > > > On Fri, Dec 18, 2020 at 03:52:04PM +0000, Mark Brown wrote: > > > > On Fri, Dec 18, 2020 at 10:08:54AM -0400, Jason Gunthorpe wrote: > > > > > > > I thought the recent LWN article summed it up nicely, auxillary bus is > > > > > for gluing to subsystems together using a driver specific software API > > > > > to connect to the HW, MFD is for splitting a physical HW into disjoint > > > > > regions of HW. > > > > > > This conflicts with the statements from Greg about not using the > > > > platform bus for things that aren't memory mapped or "direct firmware", > > > > a large proportion of MFD subfunctions are neither at least in so far as > > > > I can understand what direct firmware means. > > > > > I assume MFD will keep existing and it will somehow stop using > > > platform device for the children it builds. > > > > If it's not supposed to use platform devices so I'm assuming that the > > intention is that it should use aux devices, otherwise presumably it'd > > be making some new clone of the platform bus but I've not seen anyone > > suggesting this. > > I wouldn't assume that, I certainly don't want to see all the HW > related items in platform_device cloned roughly into aux device. > > I've understood the bus type should be basically related to the thing > that is creating the device. In a clean view platform code creates > platform devices. DT should create DT devices, ACPI creates ACPI > devices, PNP does pnp devices, etc > > So, I strongly suspect, MFD should create mfd devices on a MFD bus > type. > > Alexandre's point is completely valid, and I think is the main > challenge here, somehow avoiding duplication. > > If we were to look at it with some OOP viewpoint I'd say the generic > HW resource related parts should be some shared superclass between > 'struct device' and 'struct platform/pnp/pci/acpi/mfd/etc_device'. You're confusing things here. ACPI, DT and MFD are not busses. They are just methods to describe/register devices which will operate on buses. Busses include things like; I2C, SPI, PCI, USB and Platform (MMIO). -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog