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From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Yevgeny Kliteynik <kliteyn@nvidia.com>,
	Saeed Mahameed <saeedm@nvidia.com>
Subject: [net-next 01/16] net/mlx5: DR, Add infrastructure for supporting several steering formats
Date: Tue,  5 Jan 2021 15:03:18 -0800	[thread overview]
Message-ID: <20210105230333.239456-2-saeed@kernel.org> (raw)
In-Reply-To: <20210105230333.239456-1-saeed@kernel.org>

From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Add a struct of device specific callbacks for STE layer below dr_ste.
Each device will implement its HW-specific function, and a comon logic
from the DR code will access these functions through the new ste_ctx API.

More callbacks will follow in the subsequent patches.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
 .../mellanox/mlx5/core/steering/dr_ste.c      |  2 +-
 .../mellanox/mlx5/core/steering/dr_ste.h      | 36 +++++++++++++++++++
 2 files changed, 37 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
index d275823bff2f..171f7836fb23 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
@@ -3,7 +3,7 @@
 
 #include <linux/types.h>
 #include <linux/crc32.h>
-#include "dr_types.h"
+#include "dr_ste.h"
 
 #define DR_STE_CRC_POLY 0xEDB88320L
 #define STE_IPV4 0x1
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h
new file mode 100644
index 000000000000..59850925ebd2
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
+/* Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef	_DR_STE_
+#define	_DR_STE_
+
+#include "dr_types.h"
+
+#define DR_STE_CTX_BUILDER(fname) \
+	((*build_##fname##_init)(struct mlx5dr_ste_build *sb, \
+				 struct mlx5dr_match_param *mask))
+
+struct mlx5dr_ste_ctx {
+	void DR_STE_CTX_BUILDER(eth_l2_src_dst);
+	void DR_STE_CTX_BUILDER(eth_l3_ipv6_src);
+	void DR_STE_CTX_BUILDER(eth_l3_ipv6_dst);
+	void DR_STE_CTX_BUILDER(eth_l3_ipv4_5_tuple);
+	void DR_STE_CTX_BUILDER(eth_l2_src);
+	void DR_STE_CTX_BUILDER(eth_l2_dst);
+	void DR_STE_CTX_BUILDER(eth_l2_tnl);
+	void DR_STE_CTX_BUILDER(eth_l3_ipv4_misc);
+	void DR_STE_CTX_BUILDER(eth_ipv6_l3_l4);
+	void DR_STE_CTX_BUILDER(mpls);
+	void DR_STE_CTX_BUILDER(tnl_gre);
+	void DR_STE_CTX_BUILDER(tnl_mpls);
+	int  DR_STE_CTX_BUILDER(icmp);
+	void DR_STE_CTX_BUILDER(general_purpose);
+	void DR_STE_CTX_BUILDER(eth_l4_misc);
+	void DR_STE_CTX_BUILDER(tnl_vxlan_gpe);
+	void DR_STE_CTX_BUILDER(tnl_geneve);
+	void DR_STE_CTX_BUILDER(register_0);
+	void DR_STE_CTX_BUILDER(register_1);
+	void DR_STE_CTX_BUILDER(src_gvmi_qpn);
+};
+
+#endif  /* _DR_STE_ */
-- 
2.26.2


  reply	other threads:[~2021-01-05 23:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-05 23:03 [pull request][net-next 00/16] mlx5 SW steering updates 2021-01-05 Saeed Mahameed
2021-01-05 23:03 ` Saeed Mahameed [this message]
2021-01-05 23:03 ` [net-next 02/16] net/mlx5: DR, Move macros from dr_ste.c to header Saeed Mahameed
2021-01-05 23:03 ` [net-next 03/16] net/mlx5: DR, Use the new HW specific STE infrastructure Saeed Mahameed
2021-01-05 23:03 ` [net-next 04/16] net/mlx5: DR, Move HW STEv0 match logic to a separate file Saeed Mahameed
2021-01-05 23:03 ` [net-next 05/16] net/mlx5: DR, Remove unused macro definition from dr_ste Saeed Mahameed
2021-01-05 23:03 ` [net-next 06/16] net/mlx5: DR, Fix STEv0 source_eswitch_owner_vhca_id support Saeed Mahameed
2021-01-05 23:03 ` [net-next 07/16] net/mlx5: DR, Merge similar DR STE SET macros Saeed Mahameed
2021-01-05 23:03 ` [net-next 08/16] net/mlx5: DR, Move STEv0 look up types from mlx5_ifc_dr header Saeed Mahameed
2021-01-05 23:03 ` [net-next 09/16] net/mlx5: DR, Refactor ICMP STE builder Saeed Mahameed
2021-01-05 23:03 ` [net-next 10/16] net/mlx5: DR, Move action apply logic to dr_ste Saeed Mahameed
2021-01-05 23:03 ` [net-next 11/16] net/mlx5: DR, Add STE setters and getters per-device API Saeed Mahameed
2021-01-05 23:03 ` [net-next 12/16] net/mlx5: DR, Move STEv0 setters and getters Saeed Mahameed
2021-01-05 23:03 ` [net-next 13/16] net/mlx5: DR, Add STE tx/rx actions per-device API Saeed Mahameed
2021-01-05 23:03 ` [net-next 14/16] net/mlx5: DR, Move STEv0 action apply logic Saeed Mahameed
2021-01-05 23:03 ` [net-next 15/16] net/mlx5: DR, Add STE modify header actions per-device API Saeed Mahameed
2021-01-05 23:03 ` [net-next 16/16] net/mlx5: DR, Move STEv0 modify header logic Saeed Mahameed
2021-01-05 23:45 ` [pull request][net-next 00/16] mlx5 SW steering updates 2021-01-05 David Miller

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