All of lore.kernel.org
 help / color / mirror / Atom feed
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: stefanc@marvell.com
Cc: netdev@vger.kernel.org, thomas.petazzoni@bootlin.com,
	davem@davemloft.net, nadavh@marvell.com, ymarkman@marvell.com,
	linux-kernel@vger.kernel.org, kuba@kernel.org, mw@semihalf.com,
	andrew@lunn.ch, atenart@kernel.org
Subject: Re: [PATCH RFC net-next  11/19] net: mvpp2: add flow control RXQ and BM pool config callbacks
Date: Sun, 10 Jan 2021 18:06:42 +0000	[thread overview]
Message-ID: <20210110180642.GH1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <1610292623-15564-12-git-send-email-stefanc@marvell.com>

On Sun, Jan 10, 2021 at 05:30:15PM +0200, stefanc@marvell.com wrote:
> From: Stefan Chulski <stefanc@marvell.com>
> 
> This patch did not change any functionality.
> Added flow control RXQ and BM pool config callbacks that would be
> used to configure RXQ and BM pool thresholds.
> APIs also will disable/enable RXQ and pool Flow Control polling.
> 
> In this stage BM pool and RXQ has same stop/start thresholds
> defined in code.
> Also there are common thresholds for all RXQs.
> 
> Signed-off-by: Stefan Chulski <stefanc@marvell.com>
> ---
>  drivers/net/ethernet/marvell/mvpp2/mvpp2.h      |  51 +++++-
>  drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 169 ++++++++++++++++++++
>  2 files changed, 216 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> index 4d58af6..0ba0598 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
> @@ -763,10 +763,53 @@
>  		((kb) * 1024 - MVPP2_TX_FIFO_THRESHOLD_MIN)
>  
>  /* MSS Flow control */
> -#define MSS_SRAM_SIZE		0x800
> -#define FC_QUANTA		0xFFFF
> -#define FC_CLK_DIVIDER		0x140
> -#define MSS_THRESHOLD_STOP    768
> +#define MSS_SRAM_SIZE			0x800
> +#define MSS_FC_COM_REG			0
> +#define FLOW_CONTROL_ENABLE_BIT		BIT(0)
> +#define FLOW_CONTROL_UPDATE_COMMAND_BIT	BIT(31)
> +#define FC_QUANTA			0xFFFF
> +#define FC_CLK_DIVIDER			0x140
> +
> +#define MSS_BUF_POOL_BASE		0x40
> +#define MSS_BUF_POOL_OFFS		4
> +#define MSS_BUF_POOL_REG(id)		(MSS_BUF_POOL_BASE		\
> +					+ (id) * MSS_BUF_POOL_OFFS)
> +
> +#define MSS_BUF_POOL_STOP_MASK		0xFFF
> +#define MSS_BUF_POOL_START_MASK		(0xFFF << MSS_BUF_POOL_START_OFFS)
> +#define MSS_BUF_POOL_START_OFFS		12
> +#define MSS_BUF_POOL_PORTS_MASK		(0xF << MSS_BUF_POOL_PORTS_OFFS)
> +#define MSS_BUF_POOL_PORTS_OFFS		24
> +#define MSS_BUF_POOL_PORT_OFFS(id)	(0x1 <<				\
> +					((id) + MSS_BUF_POOL_PORTS_OFFS))
> +
> +#define MSS_RXQ_TRESH_BASE		0x200
> +#define MSS_RXQ_TRESH_OFFS		4
> +#define MSS_RXQ_TRESH_REG(q, fq)	(MSS_RXQ_TRESH_BASE + (((q) + (fq)) \
> +					* MSS_RXQ_TRESH_OFFS))
> +
> +#define MSS_RXQ_TRESH_START_MASK	0xFFFF
> +#define MSS_RXQ_TRESH_STOP_MASK		(0xFFFF << MSS_RXQ_TRESH_STOP_OFFS)
> +#define MSS_RXQ_TRESH_STOP_OFFS		16
> +
> +#define MSS_RXQ_ASS_BASE	0x80
> +#define MSS_RXQ_ASS_OFFS	4
> +#define MSS_RXQ_ASS_PER_REG	4
> +#define MSS_RXQ_ASS_PER_OFFS	8
> +#define MSS_RXQ_ASS_PORTID_OFFS	0
> +#define MSS_RXQ_ASS_PORTID_MASK	0x3
> +#define MSS_RXQ_ASS_HOSTID_OFFS	2
> +#define MSS_RXQ_ASS_HOSTID_MASK	0x3F
> +
> +#define MSS_RXQ_ASS_Q_BASE(q, fq) ((((q) + (fq)) % MSS_RXQ_ASS_PER_REG)	 \
> +				  * MSS_RXQ_ASS_PER_OFFS)
> +#define MSS_RXQ_ASS_PQ_BASE(q, fq) ((((q) + (fq)) / MSS_RXQ_ASS_PER_REG) \
> +				   * MSS_RXQ_ASS_OFFS)
> +#define MSS_RXQ_ASS_REG(q, fq) (MSS_RXQ_ASS_BASE + MSS_RXQ_ASS_PQ_BASE(q, fq))
> +
> +#define MSS_THRESHOLD_STOP	768
> +#define MSS_THRESHOLD_START	1024
> +
>  
>  /* RX buffer constants */
>  #define MVPP2_SKB_SHINFO_SIZE \
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> index bc4b8069..19648c4 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> @@ -744,6 +744,175 @@ static void *mvpp2_buf_alloc(struct mvpp2_port *port,
>  	return data;
>  }
>  
> +/* Routine calculate single queue shares address space */
> +static int mvpp22_calc_shared_addr_space(struct mvpp2_port *port)
> +{
> +	/* If number of CPU's greater than number of threads, return last
> +	 * address space
> +	 */
> +	if (num_active_cpus() >= MVPP2_MAX_THREADS)
> +		return MVPP2_MAX_THREADS - 1;
> +
> +	return num_active_cpus();

Firstly - this can be written as:

	return min(num_active_cpus(), MVPP2_MAX_THREADS - 1);

Secondly - what if the number of active CPUs change, for example due
to hotplug activity. What if we boot with maxcpus=1 and then bring the
other CPUs online after networking has been started? The number of
active CPUs is dynamically managed via the scheduler as CPUs are
brought online or offline.

> +/* Routine enable flow control for RXQs conditon */
> +void mvpp2_rxq_enable_fc(struct mvpp2_port *port)
...
> +/* Routine disable flow control for RXQs conditon */
> +void mvpp2_rxq_disable_fc(struct mvpp2_port *port)

Nothing seems to call these in this patch, so on its own, it's not
obvious how these are being called, and therefore what remedy to
suggest for num_active_cpus().

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

  reply	other threads:[~2021-01-10 18:07 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-10 15:30 [PATCH RFC net-next 00/19] net: mvpp2: Add TX Flow Control support stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 01/19] doc: marvell: add cm3-mem device tree bindings description stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 02/19] dts: marvell: add CM3 SRAM memory to cp115 ethernet device tree stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 03/19] net: mvpp2: add CM3 SRAM memory map stefanc
2021-01-10 17:04   ` Andrew Lunn
2021-01-10 17:10     ` [EXT] " Stefan Chulski
2021-01-10 17:43       ` Andrew Lunn
2021-01-10 17:49         ` Stefan Chulski
2021-01-10 17:55   ` Russell King - ARM Linux admin
2021-01-10 17:57     ` [EXT] " Stefan Chulski
2021-01-10 18:03       ` Andrew Lunn
2021-01-10 18:09         ` Stefan Chulski
2021-01-10 18:27           ` Russell King - ARM Linux admin
2021-01-10 15:30 ` [PATCH RFC net-next 04/19] net: mvpp2: add PPv23 version definition stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 05/19] net: mvpp2: always compare hw-version vs MVPP21 stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 06/19] net: mvpp2: increase BM pool size to 2048 buffers stefanc
2021-01-10 17:13   ` Andrew Lunn
2021-01-10 17:23     ` [EXT] " Stefan Chulski
2021-01-10 15:30 ` [PATCH RFC net-next 07/19] net: mvpp2: increase RXQ size to 1024 descriptors stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 08/19] net: mvpp2: add FCA periodic timer configurations stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 09/19] net: mvpp2: add FCA RXQ non occupied descriptor threshold stefanc
2021-01-10 17:36   ` kernel test robot
2021-01-10 15:30 ` [PATCH RFC net-next 10/19] net: mvpp2: add spinlock for FW FCA configuration path stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 11/19] net: mvpp2: add flow control RXQ and BM pool config callbacks stefanc
2021-01-10 18:06   ` Russell King - ARM Linux admin [this message]
2021-01-10 18:24     ` [EXT] " Stefan Chulski
2021-01-10 18:31       ` Russell King - ARM Linux admin
2021-01-10 18:38         ` Stefan Chulski
2021-01-10 18:44   ` kernel test robot
2021-01-10 15:30 ` [PATCH RFC net-next 12/19] net: mvpp2: enable global flow control stefanc
2021-01-10 18:09   ` Russell King - ARM Linux admin
2021-01-10 15:30 ` [PATCH RFC net-next 13/19] net: mvpp2: add RXQ flow control configurations stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 14/19] net: mvpp2: add ethtool flow control configuration support stefanc
2021-01-10 17:33   ` Andrew Lunn
2021-01-10 17:53     ` [EXT] " Stefan Chulski
2021-01-10 18:15   ` Russell King - ARM Linux admin
2021-01-10 18:27     ` [EXT] " Stefan Chulski
2021-01-10 18:33       ` Russell King - ARM Linux admin
2021-01-10 15:30 ` [PATCH RFC net-next 15/19] net: mvpp2: add BM protection underrun feature support stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 16/19] net: mvpp2: add PPv23 RX FIFO flow control stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 17/19] net: mvpp2: set 802.3x GoP Flow Control mode stefanc
2021-01-10 15:30 ` [PATCH RFC net-next 18/19] net: mvpp2: add ring size validation before enabling FC stefanc
2021-01-10 17:37   ` Andrew Lunn
2021-01-10 15:30 ` [PATCH RFC net-next 19/19] net: mvpp2: add TX FC firmware check stefanc
2021-01-10 18:17 ` [PATCH RFC net-next 00/19] net: mvpp2: Add TX Flow Control support Russell King - ARM Linux admin
2021-01-10 18:55   ` [EXT] " Stefan Chulski
2021-01-10 19:01     ` Russell King - ARM Linux admin
2021-01-10 19:08     ` Andrew Lunn
2021-01-10 19:11       ` Stefan Chulski
2021-01-10 19:20         ` Andrew Lunn

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210110180642.GH1551@shell.armlinux.org.uk \
    --to=linux@armlinux.org.uk \
    --cc=andrew@lunn.ch \
    --cc=atenart@kernel.org \
    --cc=davem@davemloft.net \
    --cc=kuba@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mw@semihalf.com \
    --cc=nadavh@marvell.com \
    --cc=netdev@vger.kernel.org \
    --cc=stefanc@marvell.com \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=ymarkman@marvell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.