From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72396C43381 for ; Tue, 12 Jan 2021 19:40:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 538B52310A for ; Tue, 12 Jan 2021 19:40:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392980AbhALTj4 (ORCPT ); Tue, 12 Jan 2021 14:39:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392926AbhALTj4 (ORCPT ); Tue, 12 Jan 2021 14:39:56 -0500 Received: from mail.andi.de1.cc (mail.andi.de1.cc [IPv6:2a01:238:4321:8900:456f:ecd6:43e:202c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90099C061575; Tue, 12 Jan 2021 11:39:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kemnade.info; s=20180802; h=Content-Transfer-Encoding:Content-Type: MIME-Version:References:In-Reply-To:Message-ID:Subject:Cc:To:From:Date:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=cS9C/2XYzsbjYTZ0aJ7zWNeNcxrmFX1E76BcBqiBK3c=; b=INxkXnT9LshF4+KSR5QhbpCd6w lqtWX/XifPwQgxQuq2fAMh21xFNLj76YmfvJsRsFYZ4DyFI3WpdSfakUWFPqDMegLbF4l65eYcaoR qpjCYCDtYybCUDwovkPsot+MueW/Ujjb59crkFGeS7GlicyC5fv/JPzuM1eKZXRIrXHY=; Received: from p200300ccff1586001a3da2fffebfd33a.dip0.t-ipconnect.de ([2003:cc:ff15:8600:1a3d:a2ff:febf:d33a] helo=aktux) by mail.andi.de1.cc with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1kzPVP-0003kv-Hc; Tue, 12 Jan 2021 20:39:03 +0100 Date: Tue, 12 Jan 2021 20:39:02 +0100 From: Andreas Kemnade To: Jonathan =?UTF-8?B?TmV1c2Now6RmZXI=?= Cc: linux-kernel@vger.kernel.org, Lee Jones , Rob Herring , Thierry Reding , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Alessandro Zummo , Alexandre Belloni , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Sam Ravnborg , Linus Walleij , Heiko Stuebner , Stephan Gerhold , Lubomir Rintel , Mark Brown , allen , Mauro Carvalho Chehab , "David S. Miller" , devicetree@vger.kernel.org, linux-pwm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Heiko Stuebner , Josua Mayer , Arnd Bergmann , Daniel Palmer , Andy Shevchenko Subject: Re: [PATCH v7 4/7] pwm: ntxec: Add driver for PWM function in Netronix EC Message-ID: <20210112203902.4e196d11@aktux> In-Reply-To: <20210109180220.121511-5-j.neuschaefer@gmx.net> References: <20210109180220.121511-1-j.neuschaefer@gmx.net> <20210109180220.121511-5-j.neuschaefer@gmx.net> X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org On Sat, 9 Jan 2021 19:02:17 +0100 Jonathan Neusch=C3=A4fer wrote: > The Netronix EC provides a PWM output which is used for the backlight > on some ebook readers. This patches adds a driver for the PWM output. >=20 > The .get_state callback is not implemented, because the PWM state can't > be read back from the hardware. >=20 > Signed-off-by: Jonathan Neusch=C3=A4fer > --- > v7: > - no changes >=20 > v6: > - https://lore.kernel.org/lkml/20201208011000.3060239-5-j.neuschaefer@gmx= .net/ > - Move period / duty cycle setting code to a function > - Rename pwmchip_to_priv to ntxec_pwm_from_chip > - Set period and duty cycle only before enabling the output > - Mention that duty=3D0, enable=3D1 is assumed not to happen > - Interleave writes to the period and duty cycle registers, to minimize t= he > window of time that an inconsistent state is configured >=20 > v5: > - https://lore.kernel.org/lkml/20201201011513.1627028-5-j.neuschaefer@gmx= .net/ > - Avoid truncation of period and duty cycle to 32 bits > - Make ntxec_pwm_ops const > - Use regmap_multi_reg_write > - Add comment about get_state to ntxec_pwm_ops > - Add comments about non-atomicity of (period, duty cycle) update >=20 > v4: > - https://lore.kernel.org/lkml/20201122222739.1455132-5-j.neuschaefer@gmx= .net/ > - Document hardware/driver limitations > - Only accept normal polarity > - Fix a typo ("zone" -> "zero") > - change MAX_PERIOD_NS to 0xffff * 125 > - Clamp period to the maximum rather than returning an error > - Rename private struct pointer to priv > - Rearrage control flow in _probe to save a few lines and a temporary var= iable > - Add missing MODULE_ALIAS line > - Spell out ODM >=20 > v3: > - https://lore.kernel.org/lkml/20200924192455.2484005-5-j.neuschaefer@gmx= .net/ > - Relicense as GPLv2 or later > - Add email address to copyright line > - Remove OF compatible string and don't include linux/of_device.h > - Fix bogus ?: in return line > - Don't use a comma after sentinels > - Avoid ret |=3D ... pattern > - Move 8-bit register conversion to ntxec.h >=20 > v2: > - https://lore.kernel.org/lkml/20200905133230.1014581-6-j.neuschaefer@gmx= .net/ > - Various grammar and style improvements, as suggested by Uwe Kleine-K=C3= =B6nig, > Lee Jones, and Alexandre Belloni > - Switch to regmap > - Prefix registers with NTXEC_REG_ > - Add help text to the Kconfig option > - Use the .apply callback instead of the old API > - Add a #define for the time base (125ns) > - Don't change device state in .probe; this avoids multiple problems > - Rework division and overflow check logic to perform divisions in 32 bits > - Avoid setting duty cycle to zero, to work around a hardware quirk > --- > drivers/pwm/Kconfig | 8 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-ntxec.c | 182 ++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 191 insertions(+) > create mode 100644 drivers/pwm/pwm-ntxec.c >=20 > diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig > index 0937e1c047acb..a2830b8832b97 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -393,6 +393,14 @@ config PWM_MXS > To compile this driver as a module, choose M here: the module > will be called pwm-mxs. >=20 > +config PWM_NTXEC > + tristate "Netronix embedded controller PWM support" > + depends on MFD_NTXEC > + help > + Say yes here if you want to support the PWM output of the embedded > + controller found in certain e-book readers designed by the original > + design manufacturer Netronix. > + > config PWM_OMAP_DMTIMER > tristate "OMAP Dual-Mode Timer PWM support" > depends on OF > diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile > index 18b89d7fd092a..7d97eb595bbef 100644 > --- a/drivers/pwm/Makefile > +++ b/drivers/pwm/Makefile > @@ -35,6 +35,7 @@ obj-$(CONFIG_PWM_MESON) +=3D pwm-meson.o > obj-$(CONFIG_PWM_MEDIATEK) +=3D pwm-mediatek.o > obj-$(CONFIG_PWM_MTK_DISP) +=3D pwm-mtk-disp.o > obj-$(CONFIG_PWM_MXS) +=3D pwm-mxs.o > +obj-$(CONFIG_PWM_NTXEC) +=3D pwm-ntxec.o > obj-$(CONFIG_PWM_OMAP_DMTIMER) +=3D pwm-omap-dmtimer.o > obj-$(CONFIG_PWM_PCA9685) +=3D pwm-pca9685.o > obj-$(CONFIG_PWM_PXA) +=3D pwm-pxa.o > diff --git a/drivers/pwm/pwm-ntxec.c b/drivers/pwm/pwm-ntxec.c > new file mode 100644 > index 0000000000000..1db30a6caa3ad > --- /dev/null > +++ b/drivers/pwm/pwm-ntxec.c > @@ -0,0 +1,182 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * The Netronix embedded controller is a microcontroller found in some > + * e-book readers designed by the original design manufacturer Netronix,= Inc. > + * It contains RTC, battery monitoring, system power management, and PWM > + * functionality. > + * > + * This driver implements PWM output. > + * > + * Copyright 2020 Jonathan Neusch=C3=A4fer > + * > + * Limitations: > + * - The get_state callback is not implemented, because the current stat= e of > + * the PWM output can't be read back from the hardware. > + * - The hardware can only generate normal polarity output. > + * - The period and duty cycle can't be changed together in one atomic a= ction. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct ntxec_pwm { > + struct device *dev; > + struct ntxec *ec; > + struct pwm_chip chip; > +}; > + > +static struct ntxec_pwm *ntxec_pwm_from_chip(struct pwm_chip *chip) > +{ > + return container_of(chip, struct ntxec_pwm, chip); > +} > + > +#define NTXEC_REG_AUTO_OFF_HI 0xa1 > +#define NTXEC_REG_AUTO_OFF_LO 0xa2 > +#define NTXEC_REG_ENABLE 0xa3 > +#define NTXEC_REG_PERIOD_LOW 0xa4 > +#define NTXEC_REG_PERIOD_HIGH 0xa5 > +#define NTXEC_REG_DUTY_LOW 0xa6 > +#define NTXEC_REG_DUTY_HIGH 0xa7 > + > +/* > + * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle= are > + * measured in this unit. > + */ > +#define TIME_BASE_NS 125 > + > +/* > + * The maximum input value (in nanoseconds) is determined by the time ba= se and > + * the range of the hardware registers that hold the converted value. > + * It fits into 32 bits, so we can do our calculations in 32 bits as wel= l. > + */ > +#define MAX_PERIOD_NS (TIME_BASE_NS * 0xffff) > + > +static int ntxec_pwm_set_raw_period_and_duty_cycle(struct pwm_chip *chip, > + int period, int duty) > +{ > + struct ntxec_pwm *priv =3D ntxec_pwm_from_chip(chip); > + > + /* > + * Changes to the period and duty cycle take effect as soon as the > + * corresponding low byte is written, so the hardware may be configured > + * to an inconsistent state after the period is written and before the > + * duty cycle is fully written. If, in such a case, the old duty cycle > + * is longer than the new period, the EC may output 100% for a moment. > + * > + * To minimize the time between the changes to period and duty cycle > + * taking effect, the writes are interleaved. > + */ > + > + struct reg_sequence regs[] =3D { > + { NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8) }, > + { NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8) }, > + { NTXEC_REG_PERIOD_LOW, ntxec_reg8(period) }, > + { NTXEC_REG_DUTY_LOW, ntxec_reg8(duty) }, > + }; > + > + return regmap_multi_reg_write(priv->ec->regmap, regs, ARRAY_SIZE(regs)); > +} > + > +static int ntxec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm= _dev, > + const struct pwm_state *state) > +{ > + struct ntxec_pwm *priv =3D ntxec_pwm_from_chip(chip); > + unsigned int period, duty; > + int res; > + > + if (state->polarity !=3D PWM_POLARITY_NORMAL) > + return -EINVAL; > + > + period =3D min_t(u64, state->period, MAX_PERIOD_NS); > + duty =3D min_t(u64, state->duty_cycle, period); > + > + period /=3D TIME_BASE_NS; > + duty /=3D TIME_BASE_NS; > + > + /* > + * Writing a duty cycle of zero puts the device into a state where > + * writing a higher duty cycle doesn't result in the brightness that it > + * usually results in. This can be fixed by cycling the ENABLE register. > + * > + * As a workaround, write ENABLE=3D0 when the duty cycle is zero. > + * The case that something has previously set the duty cycle to zero > + * but ENABLE=3D1, is not handled. > + */ > + if (state->enabled && duty !=3D 0) { > + res =3D ntxec_pwm_set_raw_period_and_duty_cycle(chip, period, duty); > + if (res) > + return res; > + > + res =3D regmap_write(priv->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg8(1)= ); > + if (res) > + return res; > + > + /* Disable the auto-off timer */ > + res =3D regmap_write(priv->ec->regmap, NTXEC_REG_AUTO_OFF_HI, ntxec_re= g8(0xff)); > + if (res) > + return res; > + > + return regmap_write(priv->ec->regmap, NTXEC_REG_AUTO_OFF_LO, ntxec_reg= 8(0xff)); > + } else { > + return regmap_write(priv->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg8(0)); > + } > +} > + > +static const struct pwm_ops ntxec_pwm_ops =3D { > + .owner =3D THIS_MODULE, > + .apply =3D ntxec_pwm_apply, > + /* > + * No .get_state callback, because the current state cannot be read > + * back from the hardware. > + */ > +}; > + > +static int ntxec_pwm_probe(struct platform_device *pdev) > +{ > + struct ntxec *ec =3D dev_get_drvdata(pdev->dev.parent); > + struct ntxec_pwm *priv; > + struct pwm_chip *chip; > + > + priv =3D devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + priv->ec =3D ec; > + priv->dev =3D &pdev->dev; > + > + platform_set_drvdata(pdev, priv); > + > + chip =3D &priv->chip; > + chip->dev =3D &pdev->dev; Hmm, I needed chip->dev =3D &pdev->dev.parent to use the backlight example in patch 2/7. Not sure what the correct solution is. Maybe the pwm deserves its own devicetree node. Regards, Andreas From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 850DEC433E0 for ; Tue, 12 Jan 2021 19:44:03 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3D7332310A for ; Tue, 12 Jan 2021 19:44:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3D7332310A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kemnade.info Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zfEDtiflwW9T9046qSH7JYijX0tof6tsRY4/dvD1Ezc=; b=jrQKrohiExwq+aD4G50eBAg5V yqA1airDDamWwjyjou1eL/Zq4a+5UCYkVv0NBrD3jKnCkDCqCh7plMOxA4+osXTS7A4KBNPEDFfrf QSEsOJN8ZlXfc3Ax95Efw5XcYM2suntfULRm1p1qotVDHWgr0OHn1gRSSIzoprUihEXWV5f5goRyB ZEhe0KPMr8ZZkysls0bZuOZiNnooPZ6XRD+wJ+2G9S2Cdn7zad9JZ4J+NLhElnNUsFixiB7JZ/iPb 7Ct6gt1/ciBkzBfYpf4oc0tA14uedb9B0bYck9zZ+PYycEs2wDrvlx6s0Iv5Vim2VlReheRQSSzYs ininGR6Bw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kzPXv-0001G6-Vv; Tue, 12 Jan 2021 19:41:40 +0000 Received: from mail.andi.de1.cc ([2a01:238:4321:8900:456f:ecd6:43e:202c]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kzPVd-0000JS-Ee for linux-arm-kernel@lists.infradead.org; Tue, 12 Jan 2021 19:39:40 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kemnade.info; s=20180802; h=Content-Transfer-Encoding:Content-Type: MIME-Version:References:In-Reply-To:Message-ID:Subject:Cc:To:From:Date:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=cS9C/2XYzsbjYTZ0aJ7zWNeNcxrmFX1E76BcBqiBK3c=; b=INxkXnT9LshF4+KSR5QhbpCd6w lqtWX/XifPwQgxQuq2fAMh21xFNLj76YmfvJsRsFYZ4DyFI3WpdSfakUWFPqDMegLbF4l65eYcaoR qpjCYCDtYybCUDwovkPsot+MueW/Ujjb59crkFGeS7GlicyC5fv/JPzuM1eKZXRIrXHY=; Received: from p200300ccff1586001a3da2fffebfd33a.dip0.t-ipconnect.de ([2003:cc:ff15:8600:1a3d:a2ff:febf:d33a] helo=aktux) by mail.andi.de1.cc with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1kzPVP-0003kv-Hc; Tue, 12 Jan 2021 20:39:03 +0100 Date: Tue, 12 Jan 2021 20:39:02 +0100 From: Andreas Kemnade To: Jonathan =?UTF-8?B?TmV1c2Now6RmZXI=?= Subject: Re: [PATCH v7 4/7] pwm: ntxec: Add driver for PWM function in Netronix EC Message-ID: <20210112203902.4e196d11@aktux> In-Reply-To: <20210109180220.121511-5-j.neuschaefer@gmx.net> References: <20210109180220.121511-1-j.neuschaefer@gmx.net> <20210109180220.121511-5-j.neuschaefer@gmx.net> X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210112_143917_961041_B22C7ED0 X-CRM114-Status: GOOD ( 49.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , Heiko Stuebner , linux-pwm@vger.kernel.org, Linus Walleij , Thierry Reding , Fabio Estevam , linux-rtc@vger.kernel.org, Arnd Bergmann , Mauro Carvalho Chehab , Sam Ravnborg , Daniel Palmer , Andy Shevchenko , NXP Linux Team , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , devicetree@vger.kernel.org, Stephan Gerhold , allen , Sascha Hauer , Lubomir Rintel , Rob Herring , Lee Jones , linux-arm-kernel@lists.infradead.org, Alessandro Zummo , linux-kernel@vger.kernel.org, Mark Brown , Pengutronix Kernel Team , Heiko Stuebner , Josua Mayer , Shawn Guo , "David S. Miller" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gU2F0LCAgOSBKYW4gMjAyMSAxOTowMjoxNyArMDEwMApKb25hdGhhbiBOZXVzY2jDpGZlciA8 ai5uZXVzY2hhZWZlckBnbXgubmV0PiB3cm90ZToKCj4gVGhlIE5ldHJvbml4IEVDIHByb3ZpZGVz IGEgUFdNIG91dHB1dCB3aGljaCBpcyB1c2VkIGZvciB0aGUgYmFja2xpZ2h0Cj4gb24gc29tZSBl Ym9vayByZWFkZXJzLiBUaGlzIHBhdGNoZXMgYWRkcyBhIGRyaXZlciBmb3IgdGhlIFBXTSBvdXRw dXQuCj4gCj4gVGhlIC5nZXRfc3RhdGUgY2FsbGJhY2sgaXMgbm90IGltcGxlbWVudGVkLCBiZWNh dXNlIHRoZSBQV00gc3RhdGUgY2FuJ3QKPiBiZSByZWFkIGJhY2sgZnJvbSB0aGUgaGFyZHdhcmUu Cj4gCj4gU2lnbmVkLW9mZi1ieTogSm9uYXRoYW4gTmV1c2Now6RmZXIgPGoubmV1c2NoYWVmZXJA Z214Lm5ldD4KPiAtLS0KPiB2NzoKPiAtIG5vIGNoYW5nZXMKPiAKPiB2NjoKPiAtIGh0dHBzOi8v bG9yZS5rZXJuZWwub3JnL2xrbWwvMjAyMDEyMDgwMTEwMDAuMzA2MDIzOS01LWoubmV1c2NoYWVm ZXJAZ214Lm5ldC8KPiAtIE1vdmUgcGVyaW9kIC8gZHV0eSBjeWNsZSBzZXR0aW5nIGNvZGUgdG8g YSBmdW5jdGlvbgo+IC0gUmVuYW1lIHB3bWNoaXBfdG9fcHJpdiB0byBudHhlY19wd21fZnJvbV9j aGlwCj4gLSBTZXQgcGVyaW9kIGFuZCBkdXR5IGN5Y2xlIG9ubHkgYmVmb3JlIGVuYWJsaW5nIHRo ZSBvdXRwdXQKPiAtIE1lbnRpb24gdGhhdCBkdXR5PTAsIGVuYWJsZT0xIGlzIGFzc3VtZWQgbm90 IHRvIGhhcHBlbgo+IC0gSW50ZXJsZWF2ZSB3cml0ZXMgdG8gdGhlIHBlcmlvZCBhbmQgZHV0eSBj eWNsZSByZWdpc3RlcnMsIHRvIG1pbmltaXplIHRoZQo+ICAgd2luZG93IG9mIHRpbWUgdGhhdCBh biBpbmNvbnNpc3RlbnQgc3RhdGUgaXMgY29uZmlndXJlZAo+IAo+IHY1Ogo+IC0gaHR0cHM6Ly9s b3JlLmtlcm5lbC5vcmcvbGttbC8yMDIwMTIwMTAxMTUxMy4xNjI3MDI4LTUtai5uZXVzY2hhZWZl ckBnbXgubmV0Lwo+IC0gQXZvaWQgdHJ1bmNhdGlvbiBvZiBwZXJpb2QgYW5kIGR1dHkgY3ljbGUg dG8gMzIgYml0cwo+IC0gTWFrZSBudHhlY19wd21fb3BzIGNvbnN0Cj4gLSBVc2UgcmVnbWFwX211 bHRpX3JlZ193cml0ZQo+IC0gQWRkIGNvbW1lbnQgYWJvdXQgZ2V0X3N0YXRlIHRvIG50eGVjX3B3 bV9vcHMKPiAtIEFkZCBjb21tZW50cyBhYm91dCBub24tYXRvbWljaXR5IG9mIChwZXJpb2QsIGR1 dHkgY3ljbGUpIHVwZGF0ZQo+IAo+IHY0Ogo+IC0gaHR0cHM6Ly9sb3JlLmtlcm5lbC5vcmcvbGtt bC8yMDIwMTEyMjIyMjczOS4xNDU1MTMyLTUtai5uZXVzY2hhZWZlckBnbXgubmV0Lwo+IC0gRG9j dW1lbnQgaGFyZHdhcmUvZHJpdmVyIGxpbWl0YXRpb25zCj4gLSBPbmx5IGFjY2VwdCBub3JtYWwg cG9sYXJpdHkKPiAtIEZpeCBhIHR5cG8gKCJ6b25lIiAtPiAiemVybyIpCj4gLSBjaGFuZ2UgTUFY X1BFUklPRF9OUyB0byAweGZmZmYgKiAxMjUKPiAtIENsYW1wIHBlcmlvZCB0byB0aGUgbWF4aW11 bSByYXRoZXIgdGhhbiByZXR1cm5pbmcgYW4gZXJyb3IKPiAtIFJlbmFtZSBwcml2YXRlIHN0cnVj dCBwb2ludGVyIHRvIHByaXYKPiAtIFJlYXJyYWdlIGNvbnRyb2wgZmxvdyBpbiBfcHJvYmUgdG8g c2F2ZSBhIGZldyBsaW5lcyBhbmQgYSB0ZW1wb3JhcnkgdmFyaWFibGUKPiAtIEFkZCBtaXNzaW5n IE1PRFVMRV9BTElBUyBsaW5lCj4gLSBTcGVsbCBvdXQgT0RNCj4gCj4gdjM6Cj4gLSBodHRwczov L2xvcmUua2VybmVsLm9yZy9sa21sLzIwMjAwOTI0MTkyNDU1LjI0ODQwMDUtNS1qLm5ldXNjaGFl ZmVyQGdteC5uZXQvCj4gLSBSZWxpY2Vuc2UgYXMgR1BMdjIgb3IgbGF0ZXIKPiAtIEFkZCBlbWFp bCBhZGRyZXNzIHRvIGNvcHlyaWdodCBsaW5lCj4gLSBSZW1vdmUgT0YgY29tcGF0aWJsZSBzdHJp bmcgYW5kIGRvbid0IGluY2x1ZGUgbGludXgvb2ZfZGV2aWNlLmgKPiAtIEZpeCBib2d1cyA/OiBp biByZXR1cm4gbGluZQo+IC0gRG9uJ3QgdXNlIGEgY29tbWEgYWZ0ZXIgc2VudGluZWxzCj4gLSBB dm9pZCByZXQgfD0gLi4uIHBhdHRlcm4KPiAtIE1vdmUgOC1iaXQgcmVnaXN0ZXIgY29udmVyc2lv biB0byBudHhlYy5oCj4gCj4gdjI6Cj4gLSBodHRwczovL2xvcmUua2VybmVsLm9yZy9sa21sLzIw MjAwOTA1MTMzMjMwLjEwMTQ1ODEtNi1qLm5ldXNjaGFlZmVyQGdteC5uZXQvCj4gLSBWYXJpb3Vz IGdyYW1tYXIgYW5kIHN0eWxlIGltcHJvdmVtZW50cywgYXMgc3VnZ2VzdGVkIGJ5IFV3ZSBLbGVp bmUtS8O2bmlnLAo+ICAgTGVlIEpvbmVzLCBhbmQgQWxleGFuZHJlIEJlbGxvbmkKPiAtIFN3aXRj aCB0byByZWdtYXAKPiAtIFByZWZpeCByZWdpc3RlcnMgd2l0aCBOVFhFQ19SRUdfCj4gLSBBZGQg aGVscCB0ZXh0IHRvIHRoZSBLY29uZmlnIG9wdGlvbgo+IC0gVXNlIHRoZSAuYXBwbHkgY2FsbGJh Y2sgaW5zdGVhZCBvZiB0aGUgb2xkIEFQSQo+IC0gQWRkIGEgI2RlZmluZSBmb3IgdGhlIHRpbWUg YmFzZSAoMTI1bnMpCj4gLSBEb24ndCBjaGFuZ2UgZGV2aWNlIHN0YXRlIGluIC5wcm9iZTsgdGhp cyBhdm9pZHMgbXVsdGlwbGUgcHJvYmxlbXMKPiAtIFJld29yayBkaXZpc2lvbiBhbmQgb3ZlcmZs b3cgY2hlY2sgbG9naWMgdG8gcGVyZm9ybSBkaXZpc2lvbnMgaW4gMzIgYml0cwo+IC0gQXZvaWQg c2V0dGluZyBkdXR5IGN5Y2xlIHRvIHplcm8sIHRvIHdvcmsgYXJvdW5kIGEgaGFyZHdhcmUgcXVp cmsKPiAtLS0KPiAgZHJpdmVycy9wd20vS2NvbmZpZyAgICAgfCAgIDggKysKPiAgZHJpdmVycy9w d20vTWFrZWZpbGUgICAgfCAgIDEgKwo+ICBkcml2ZXJzL3B3bS9wd20tbnR4ZWMuYyB8IDE4MiAr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrCj4gIDMgZmlsZXMgY2hhbmdl ZCwgMTkxIGluc2VydGlvbnMoKykKPiAgY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMvcHdtL3B3 bS1udHhlYy5jCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvcHdtL0tjb25maWcgYi9kcml2ZXJz L3B3bS9LY29uZmlnCj4gaW5kZXggMDkzN2UxYzA0N2FjYi4uYTI4MzBiODgzMmI5NyAxMDA2NDQK PiAtLS0gYS9kcml2ZXJzL3B3bS9LY29uZmlnCj4gKysrIGIvZHJpdmVycy9wd20vS2NvbmZpZwo+ IEBAIC0zOTMsNiArMzkzLDE0IEBAIGNvbmZpZyBQV01fTVhTCj4gIAkgIFRvIGNvbXBpbGUgdGhp cyBkcml2ZXIgYXMgYSBtb2R1bGUsIGNob29zZSBNIGhlcmU6IHRoZSBtb2R1bGUKPiAgCSAgd2ls bCBiZSBjYWxsZWQgcHdtLW14cy4KPiAKPiArY29uZmlnIFBXTV9OVFhFQwo+ICsJdHJpc3RhdGUg Ik5ldHJvbml4IGVtYmVkZGVkIGNvbnRyb2xsZXIgUFdNIHN1cHBvcnQiCj4gKwlkZXBlbmRzIG9u IE1GRF9OVFhFQwo+ICsJaGVscAo+ICsJICBTYXkgeWVzIGhlcmUgaWYgeW91IHdhbnQgdG8gc3Vw cG9ydCB0aGUgUFdNIG91dHB1dCBvZiB0aGUgZW1iZWRkZWQKPiArCSAgY29udHJvbGxlciBmb3Vu ZCBpbiBjZXJ0YWluIGUtYm9vayByZWFkZXJzIGRlc2lnbmVkIGJ5IHRoZSBvcmlnaW5hbAo+ICsJ ICBkZXNpZ24gbWFudWZhY3R1cmVyIE5ldHJvbml4Lgo+ICsKPiAgY29uZmlnIFBXTV9PTUFQX0RN VElNRVIKPiAgCXRyaXN0YXRlICJPTUFQIER1YWwtTW9kZSBUaW1lciBQV00gc3VwcG9ydCIKPiAg CWRlcGVuZHMgb24gT0YKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9wd20vTWFrZWZpbGUgYi9kcml2 ZXJzL3B3bS9NYWtlZmlsZQo+IGluZGV4IDE4Yjg5ZDdmZDA5MmEuLjdkOTdlYjU5NWJiZWYgMTAw NjQ0Cj4gLS0tIGEvZHJpdmVycy9wd20vTWFrZWZpbGUKPiArKysgYi9kcml2ZXJzL3B3bS9NYWtl ZmlsZQo+IEBAIC0zNSw2ICszNSw3IEBAIG9iai0kKENPTkZJR19QV01fTUVTT04pCQkrPSBwd20t bWVzb24ubwo+ICBvYmotJChDT05GSUdfUFdNX01FRElBVEVLKQkrPSBwd20tbWVkaWF0ZWsubwo+ ICBvYmotJChDT05GSUdfUFdNX01US19ESVNQKQkrPSBwd20tbXRrLWRpc3Aubwo+ICBvYmotJChD T05GSUdfUFdNX01YUykJCSs9IHB3bS1teHMubwo+ICtvYmotJChDT05GSUdfUFdNX05UWEVDKQkJ Kz0gcHdtLW50eGVjLm8KPiAgb2JqLSQoQ09ORklHX1BXTV9PTUFQX0RNVElNRVIpCSs9IHB3bS1v bWFwLWRtdGltZXIubwo+ICBvYmotJChDT05GSUdfUFdNX1BDQTk2ODUpCSs9IHB3bS1wY2E5Njg1 Lm8KPiAgb2JqLSQoQ09ORklHX1BXTV9QWEEpCQkrPSBwd20tcHhhLm8KPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9wd20vcHdtLW50eGVjLmMgYi9kcml2ZXJzL3B3bS9wd20tbnR4ZWMuYwo+IG5ldyBm aWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMDAwMDAwMC4uMWRiMzBhNmNhYTNhZAo+IC0t LSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL3B3bS9wd20tbnR4ZWMuYwo+IEBAIC0wLDAgKzEs MTgyIEBACj4gKy8vIFNQRFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwtMi4wLW9yLWxhdGVyCj4g Ky8qCj4gKyAqIFRoZSBOZXRyb25peCBlbWJlZGRlZCBjb250cm9sbGVyIGlzIGEgbWljcm9jb250 cm9sbGVyIGZvdW5kIGluIHNvbWUKPiArICogZS1ib29rIHJlYWRlcnMgZGVzaWduZWQgYnkgdGhl IG9yaWdpbmFsIGRlc2lnbiBtYW51ZmFjdHVyZXIgTmV0cm9uaXgsIEluYy4KPiArICogSXQgY29u dGFpbnMgUlRDLCBiYXR0ZXJ5IG1vbml0b3JpbmcsIHN5c3RlbSBwb3dlciBtYW5hZ2VtZW50LCBh bmQgUFdNCj4gKyAqIGZ1bmN0aW9uYWxpdHkuCj4gKyAqCj4gKyAqIFRoaXMgZHJpdmVyIGltcGxl bWVudHMgUFdNIG91dHB1dC4KPiArICoKPiArICogQ29weXJpZ2h0IDIwMjAgSm9uYXRoYW4gTmV1 c2Now6RmZXIgPGoubmV1c2NoYWVmZXJAZ214Lm5ldD4KPiArICoKPiArICogTGltaXRhdGlvbnM6 Cj4gKyAqIC0gVGhlIGdldF9zdGF0ZSBjYWxsYmFjayBpcyBub3QgaW1wbGVtZW50ZWQsIGJlY2F1 c2UgdGhlIGN1cnJlbnQgc3RhdGUgb2YKPiArICogICB0aGUgUFdNIG91dHB1dCBjYW4ndCBiZSBy ZWFkIGJhY2sgZnJvbSB0aGUgaGFyZHdhcmUuCj4gKyAqIC0gVGhlIGhhcmR3YXJlIGNhbiBvbmx5 IGdlbmVyYXRlIG5vcm1hbCBwb2xhcml0eSBvdXRwdXQuCj4gKyAqIC0gVGhlIHBlcmlvZCBhbmQg ZHV0eSBjeWNsZSBjYW4ndCBiZSBjaGFuZ2VkIHRvZ2V0aGVyIGluIG9uZSBhdG9taWMgYWN0aW9u Lgo+ICsgKi8KPiArCj4gKyNpbmNsdWRlIDxsaW51eC9tZmQvbnR4ZWMuaD4KPiArI2luY2x1ZGUg PGxpbnV4L21vZHVsZS5oPgo+ICsjaW5jbHVkZSA8bGludXgvcGxhdGZvcm1fZGV2aWNlLmg+Cj4g KyNpbmNsdWRlIDxsaW51eC9wd20uaD4KPiArI2luY2x1ZGUgPGxpbnV4L3JlZ21hcC5oPgo+ICsj aW5jbHVkZSA8bGludXgvdHlwZXMuaD4KPiArCj4gK3N0cnVjdCBudHhlY19wd20gewo+ICsJc3Ry dWN0IGRldmljZSAqZGV2Owo+ICsJc3RydWN0IG50eGVjICplYzsKPiArCXN0cnVjdCBwd21fY2hp cCBjaGlwOwo+ICt9Owo+ICsKPiArc3RhdGljIHN0cnVjdCBudHhlY19wd20gKm50eGVjX3B3bV9m cm9tX2NoaXAoc3RydWN0IHB3bV9jaGlwICpjaGlwKQo+ICt7Cj4gKwlyZXR1cm4gY29udGFpbmVy X29mKGNoaXAsIHN0cnVjdCBudHhlY19wd20sIGNoaXApOwo+ICt9Cj4gKwo+ICsjZGVmaW5lIE5U WEVDX1JFR19BVVRPX09GRl9ISQkweGExCj4gKyNkZWZpbmUgTlRYRUNfUkVHX0FVVE9fT0ZGX0xP CTB4YTIKPiArI2RlZmluZSBOVFhFQ19SRUdfRU5BQkxFCTB4YTMKPiArI2RlZmluZSBOVFhFQ19S RUdfUEVSSU9EX0xPVwkweGE0Cj4gKyNkZWZpbmUgTlRYRUNfUkVHX1BFUklPRF9ISUdICTB4YTUK PiArI2RlZmluZSBOVFhFQ19SRUdfRFVUWV9MT1cJMHhhNgo+ICsjZGVmaW5lIE5UWEVDX1JFR19E VVRZX0hJR0gJMHhhNwo+ICsKPiArLyoKPiArICogVGhlIHRpbWUgYmFzZSB1c2VkIGluIHRoZSBF QyBpcyA4TUh6LCBvciAxMjVucy4gUGVyaW9kIGFuZCBkdXR5IGN5Y2xlIGFyZQo+ICsgKiBtZWFz dXJlZCBpbiB0aGlzIHVuaXQuCj4gKyAqLwo+ICsjZGVmaW5lIFRJTUVfQkFTRV9OUyAxMjUKPiAr Cj4gKy8qCj4gKyAqIFRoZSBtYXhpbXVtIGlucHV0IHZhbHVlIChpbiBuYW5vc2Vjb25kcykgaXMg ZGV0ZXJtaW5lZCBieSB0aGUgdGltZSBiYXNlIGFuZAo+ICsgKiB0aGUgcmFuZ2Ugb2YgdGhlIGhh cmR3YXJlIHJlZ2lzdGVycyB0aGF0IGhvbGQgdGhlIGNvbnZlcnRlZCB2YWx1ZS4KPiArICogSXQg Zml0cyBpbnRvIDMyIGJpdHMsIHNvIHdlIGNhbiBkbyBvdXIgY2FsY3VsYXRpb25zIGluIDMyIGJp dHMgYXMgd2VsbC4KPiArICovCj4gKyNkZWZpbmUgTUFYX1BFUklPRF9OUyAoVElNRV9CQVNFX05T ICogMHhmZmZmKQo+ICsKPiArc3RhdGljIGludCBudHhlY19wd21fc2V0X3Jhd19wZXJpb2RfYW5k X2R1dHlfY3ljbGUoc3RydWN0IHB3bV9jaGlwICpjaGlwLAo+ICsJCQkJCQkgICBpbnQgcGVyaW9k LCBpbnQgZHV0eSkKPiArewo+ICsJc3RydWN0IG50eGVjX3B3bSAqcHJpdiA9IG50eGVjX3B3bV9m cm9tX2NoaXAoY2hpcCk7Cj4gKwo+ICsJLyoKPiArCSAqIENoYW5nZXMgdG8gdGhlIHBlcmlvZCBh bmQgZHV0eSBjeWNsZSB0YWtlIGVmZmVjdCBhcyBzb29uIGFzIHRoZQo+ICsJICogY29ycmVzcG9u ZGluZyBsb3cgYnl0ZSBpcyB3cml0dGVuLCBzbyB0aGUgaGFyZHdhcmUgbWF5IGJlIGNvbmZpZ3Vy ZWQKPiArCSAqIHRvIGFuIGluY29uc2lzdGVudCBzdGF0ZSBhZnRlciB0aGUgcGVyaW9kIGlzIHdy aXR0ZW4gYW5kIGJlZm9yZSB0aGUKPiArCSAqIGR1dHkgY3ljbGUgaXMgZnVsbHkgd3JpdHRlbi4g SWYsIGluIHN1Y2ggYSBjYXNlLCB0aGUgb2xkIGR1dHkgY3ljbGUKPiArCSAqIGlzIGxvbmdlciB0 aGFuIHRoZSBuZXcgcGVyaW9kLCB0aGUgRUMgbWF5IG91dHB1dCAxMDAlIGZvciBhIG1vbWVudC4K PiArCSAqCj4gKwkgKiBUbyBtaW5pbWl6ZSB0aGUgdGltZSBiZXR3ZWVuIHRoZSBjaGFuZ2VzIHRv IHBlcmlvZCBhbmQgZHV0eSBjeWNsZQo+ICsJICogdGFraW5nIGVmZmVjdCwgdGhlIHdyaXRlcyBh cmUgaW50ZXJsZWF2ZWQuCj4gKwkgKi8KPiArCj4gKwlzdHJ1Y3QgcmVnX3NlcXVlbmNlIHJlZ3Nb XSA9IHsKPiArCQl7IE5UWEVDX1JFR19QRVJJT0RfSElHSCwgbnR4ZWNfcmVnOChwZXJpb2QgPj4g OCkgfSwKPiArCQl7IE5UWEVDX1JFR19EVVRZX0hJR0gsIG50eGVjX3JlZzgoZHV0eSA+PiA4KSB9 LAo+ICsJCXsgTlRYRUNfUkVHX1BFUklPRF9MT1csIG50eGVjX3JlZzgocGVyaW9kKSB9LAo+ICsJ CXsgTlRYRUNfUkVHX0RVVFlfTE9XLCBudHhlY19yZWc4KGR1dHkpIH0sCj4gKwl9Owo+ICsKPiAr CXJldHVybiByZWdtYXBfbXVsdGlfcmVnX3dyaXRlKHByaXYtPmVjLT5yZWdtYXAsIHJlZ3MsIEFS UkFZX1NJWkUocmVncykpOwo+ICt9Cj4gKwo+ICtzdGF0aWMgaW50IG50eGVjX3B3bV9hcHBseShz dHJ1Y3QgcHdtX2NoaXAgKmNoaXAsIHN0cnVjdCBwd21fZGV2aWNlICpwd21fZGV2LAo+ICsJCQkg ICBjb25zdCBzdHJ1Y3QgcHdtX3N0YXRlICpzdGF0ZSkKPiArewo+ICsJc3RydWN0IG50eGVjX3B3 bSAqcHJpdiA9IG50eGVjX3B3bV9mcm9tX2NoaXAoY2hpcCk7Cj4gKwl1bnNpZ25lZCBpbnQgcGVy aW9kLCBkdXR5Owo+ICsJaW50IHJlczsKPiArCj4gKwlpZiAoc3RhdGUtPnBvbGFyaXR5ICE9IFBX TV9QT0xBUklUWV9OT1JNQUwpCj4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gKwo+ICsJcGVyaW9kID0g bWluX3QodTY0LCBzdGF0ZS0+cGVyaW9kLCBNQVhfUEVSSU9EX05TKTsKPiArCWR1dHkgICA9IG1p bl90KHU2NCwgc3RhdGUtPmR1dHlfY3ljbGUsIHBlcmlvZCk7Cj4gKwo+ICsJcGVyaW9kIC89IFRJ TUVfQkFTRV9OUzsKPiArCWR1dHkgICAvPSBUSU1FX0JBU0VfTlM7Cj4gKwo+ICsJLyoKPiArCSAq IFdyaXRpbmcgYSBkdXR5IGN5Y2xlIG9mIHplcm8gcHV0cyB0aGUgZGV2aWNlIGludG8gYSBzdGF0 ZSB3aGVyZQo+ICsJICogd3JpdGluZyBhIGhpZ2hlciBkdXR5IGN5Y2xlIGRvZXNuJ3QgcmVzdWx0 IGluIHRoZSBicmlnaHRuZXNzIHRoYXQgaXQKPiArCSAqIHVzdWFsbHkgcmVzdWx0cyBpbi4gVGhp cyBjYW4gYmUgZml4ZWQgYnkgY3ljbGluZyB0aGUgRU5BQkxFIHJlZ2lzdGVyLgo+ICsJICoKPiAr CSAqIEFzIGEgd29ya2Fyb3VuZCwgd3JpdGUgRU5BQkxFPTAgd2hlbiB0aGUgZHV0eSBjeWNsZSBp cyB6ZXJvLgo+ICsJICogVGhlIGNhc2UgdGhhdCBzb21ldGhpbmcgaGFzIHByZXZpb3VzbHkgc2V0 IHRoZSBkdXR5IGN5Y2xlIHRvIHplcm8KPiArCSAqIGJ1dCBFTkFCTEU9MSwgaXMgbm90IGhhbmRs ZWQuCj4gKwkgKi8KPiArCWlmIChzdGF0ZS0+ZW5hYmxlZCAmJiBkdXR5ICE9IDApIHsKPiArCQly ZXMgPSBudHhlY19wd21fc2V0X3Jhd19wZXJpb2RfYW5kX2R1dHlfY3ljbGUoY2hpcCwgcGVyaW9k LCBkdXR5KTsKPiArCQlpZiAocmVzKQo+ICsJCQlyZXR1cm4gcmVzOwo+ICsKPiArCQlyZXMgPSBy ZWdtYXBfd3JpdGUocHJpdi0+ZWMtPnJlZ21hcCwgTlRYRUNfUkVHX0VOQUJMRSwgbnR4ZWNfcmVn OCgxKSk7Cj4gKwkJaWYgKHJlcykKPiArCQkJcmV0dXJuIHJlczsKPiArCj4gKwkJLyogRGlzYWJs ZSB0aGUgYXV0by1vZmYgdGltZXIgKi8KPiArCQlyZXMgPSByZWdtYXBfd3JpdGUocHJpdi0+ZWMt PnJlZ21hcCwgTlRYRUNfUkVHX0FVVE9fT0ZGX0hJLCBudHhlY19yZWc4KDB4ZmYpKTsKPiArCQlp ZiAocmVzKQo+ICsJCQlyZXR1cm4gcmVzOwo+ICsKPiArCQlyZXR1cm4gcmVnbWFwX3dyaXRlKHBy aXYtPmVjLT5yZWdtYXAsIE5UWEVDX1JFR19BVVRPX09GRl9MTywgbnR4ZWNfcmVnOCgweGZmKSk7 Cj4gKwl9IGVsc2Ugewo+ICsJCXJldHVybiByZWdtYXBfd3JpdGUocHJpdi0+ZWMtPnJlZ21hcCwg TlRYRUNfUkVHX0VOQUJMRSwgbnR4ZWNfcmVnOCgwKSk7Cj4gKwl9Cj4gK30KPiArCj4gK3N0YXRp YyBjb25zdCBzdHJ1Y3QgcHdtX29wcyBudHhlY19wd21fb3BzID0gewo+ICsJLm93bmVyID0gVEhJ U19NT0RVTEUsCj4gKwkuYXBwbHkgPSBudHhlY19wd21fYXBwbHksCj4gKwkvKgo+ICsJICogTm8g LmdldF9zdGF0ZSBjYWxsYmFjaywgYmVjYXVzZSB0aGUgY3VycmVudCBzdGF0ZSBjYW5ub3QgYmUg cmVhZAo+ICsJICogYmFjayBmcm9tIHRoZSBoYXJkd2FyZS4KPiArCSAqLwo+ICt9Owo+ICsKPiAr c3RhdGljIGludCBudHhlY19wd21fcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikK PiArewo+ICsJc3RydWN0IG50eGVjICplYyA9IGRldl9nZXRfZHJ2ZGF0YShwZGV2LT5kZXYucGFy ZW50KTsKPiArCXN0cnVjdCBudHhlY19wd20gKnByaXY7Cj4gKwlzdHJ1Y3QgcHdtX2NoaXAgKmNo aXA7Cj4gKwo+ICsJcHJpdiA9IGRldm1fa3phbGxvYygmcGRldi0+ZGV2LCBzaXplb2YoKnByaXYp LCBHRlBfS0VSTkVMKTsKPiArCWlmICghcHJpdikKPiArCQlyZXR1cm4gLUVOT01FTTsKPiArCj4g Kwlwcml2LT5lYyA9IGVjOwo+ICsJcHJpdi0+ZGV2ID0gJnBkZXYtPmRldjsKPiArCj4gKwlwbGF0 Zm9ybV9zZXRfZHJ2ZGF0YShwZGV2LCBwcml2KTsKPiArCj4gKwljaGlwID0gJnByaXYtPmNoaXA7 Cj4gKwljaGlwLT5kZXYgPSAmcGRldi0+ZGV2OwoKSG1tLCBJIG5lZWRlZApjaGlwLT5kZXYgPSAm cGRldi0+ZGV2LnBhcmVudCB0byB1c2UgdGhlIGJhY2tsaWdodCBleGFtcGxlCmluIHBhdGNoIDIv Ny4KTm90IHN1cmUgd2hhdCB0aGUgY29ycmVjdCBzb2x1dGlvbiBpcy4gTWF5YmUgdGhlIHB3bSBk ZXNlcnZlcyBpdHMgb3duCmRldmljZXRyZWUgbm9kZS4KClJlZ2FyZHMsCkFuZHJlYXMKCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJu ZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRw Oi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK