From: Jason Gunthorpe <jgg@nvidia.com>
To: Weihang Li <liweihang@huawei.com>
Cc: <dledford@redhat.com>, <leon@kernel.org>,
<linux-rdma@vger.kernel.org>, <linuxarm@openeuler.org>
Subject: Re: [PATCH v2 for-next] RDMA/hns: Create CQ with selected CQN for bank load balance
Date: Mon, 18 Jan 2021 17:01:07 -0400 [thread overview]
Message-ID: <20210118210107.GB797553@nvidia.com> (raw)
In-Reply-To: <1610008589-35770-1-git-send-email-liweihang@huawei.com>
On Thu, Jan 07, 2021 at 04:36:29PM +0800, Weihang Li wrote:
> From: Yangyang Li <liyangyang20@huawei.com>
>
> In order to improve performance by balancing the load between different
> banks of cache, the CQC cache is desigend to choose one of 4 banks
> according to lower 2 bits of CQN. The hns driver needs to count the number
> of CQ on each bank and then assigns the CQ being created to the bank with
> the minimum load first.
>
> Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
> Signed-off-by: Weihang Li <liweihang@huawei.com>
> ---
> Changes since v1:
> - Change GFP_ATOMIC to GFP_KERNEL as there is a chance of memory allocation
> failure, and change the spin lock to mutex lock because ida_alloc_range()
> may sleep.
> - Link: https://patchwork.kernel.org/project/linux-rdma/patch/1609742115-47270-1-git-send-email-liweihang@huawei.com/
>
> drivers/infiniband/hw/hns/hns_roce_cq.c | 115 +++++++++++++++++++++++-----
> drivers/infiniband/hw/hns/hns_roce_device.h | 10 ++-
> drivers/infiniband/hw/hns/hns_roce_main.c | 8 +-
> 3 files changed, 105 insertions(+), 28 deletions(-)
Applied to for-next, thanks
Jason
prev parent reply other threads:[~2021-01-18 21:02 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-07 8:36 [PATCH v2 for-next] RDMA/hns: Create CQ with selected CQN for bank load balance Weihang Li
2021-01-18 21:01 ` Jason Gunthorpe [this message]
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