From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 990E0C433DB for ; Tue, 19 Jan 2021 20:36:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1CA9723107 for ; Tue, 19 Jan 2021 20:36:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1CA9723107 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fNMGHWv1cEq/GnVtN/9wtKJrhpbXoefCzpfA44cOlvg=; b=uSjLJHpyWB+IEBlQWZ7dFhvUV pFGA2pLyW084JLOnJ53hKvQgxjYAY2t7m3+uwvW3xtAO4U7ug4lzp/c0eXeg4fb6XE/gRNBYRq6Ve 85WrAKVIfRK1JOFXm/cT0qWY7EwMG/NJubRvo2/jTPtCK4+QPH/yEG/V+b9JT8pg4eghE+UjzGtkq CuoikG+bzWndQZoMDC+/ghMEVAs33TYCgssCMxPDexAAo/cnd0qlnF+WPwqrHFrXoakNjUCVbOapE WFNqFZ6Fz6vSmtB+ZZfAhVg7IMrjP3jjL9oqeQAixAUUdakjjBuuEaWD31RrwUMou4TnHUaW1NVt2 /bBEJMDfw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1xiY-0000cc-FZ; Tue, 19 Jan 2021 20:35:10 +0000 Received: from relay2-d.mail.gandi.net ([217.70.183.194]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1xiV-0000bi-4d for linux-arm-kernel@lists.infradead.org; Tue, 19 Jan 2021 20:35:08 +0000 X-Originating-IP: 86.202.109.140 Received: from localhost (lfbn-lyo-1-13-140.w86-202.abo.wanadoo.fr [86.202.109.140]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 3617C40004; Tue, 19 Jan 2021 20:35:00 +0000 (UTC) Date: Tue, 19 Jan 2021 21:35:00 +0100 From: Alexandre Belloni To: Steen Hegelund Subject: Re: [PATCH v3 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Message-ID: <20210119203500.GO3666@piout.net> References: <20210114162432.3039657-1-steen.hegelund@microchip.com> <20210114162432.3039657-2-steen.hegelund@microchip.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210114162432.3039657-2-steen.hegelund@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210119_153507_273371_FFACE6BE X-CRM114-Status: GOOD ( 16.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , devicetree@vger.kernel.org, Gregory Clement , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , Rob Herring , Philipp Zabel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Every patches need a commit message, even if in this case it will be very small. On 14/01/2021 17:24:30+0100, Steen Hegelund wrote: > Signed-off-by: Steen Hegelund > --- > .../bindings/reset/microchip,rst.yaml | 59 +++++++++++++++++++ > 1 file changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml > > diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > new file mode 100644 > index 000000000000..af01016e246f > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip Sparx5 Switch Reset Controller > + > +maintainers: > + - Steen Hegelund > + - Lars Povlsen > + > +description: | > + The Microchip Sparx5 Switch provides reset control and implements the following > + functions > + - One Time Switch Core Reset (Soft Reset) > + > +properties: > + $nodename: > + pattern: "^reset-controller@[0-9a-f]+$" > + > + compatible: > + const: microchip,sparx5-switch-reset > + > + reg: > + maxItems: 1 > + > + "#reset-cells": > + const: 1 > + > + cpu-syscon: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: syscon used to access CPU reset > + maxItems: 1 > + > + gcb-syscon: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: syscon used to access Global Control Block > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - "#reset-cells" > + - cpu-syscon > + - gcb-syscon > + > +additionalProperties: false > + > +examples: > + - | > + reset: reset-controller@0 { > + compatible = "microchip,sparx5-switch-reset"; > + reg = <0x0 0x0>; > + #reset-cells = <1>; > + cpu-syscon = <&cpu_ctrl>; > + gcb-syscon = <&gcb_ctrl>; > + }; > + > -- > 2.29.2 > -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37CEDC433DB for ; Tue, 19 Jan 2021 20:36:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2C8A2310D for ; Tue, 19 Jan 2021 20:36:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730379AbhASUgW (ORCPT ); Tue, 19 Jan 2021 15:36:22 -0500 Received: from relay2-d.mail.gandi.net ([217.70.183.194]:42595 "EHLO relay2-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391495AbhASUgC (ORCPT ); Tue, 19 Jan 2021 15:36:02 -0500 X-Originating-IP: 86.202.109.140 Received: from localhost (lfbn-lyo-1-13-140.w86-202.abo.wanadoo.fr [86.202.109.140]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 3617C40004; Tue, 19 Jan 2021 20:35:00 +0000 (UTC) Date: Tue, 19 Jan 2021 21:35:00 +0100 From: Alexandre Belloni To: Steen Hegelund Cc: Philipp Zabel , Rob Herring , Andrew Lunn , Microchip Linux Driver Support , Gregory Clement , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Message-ID: <20210119203500.GO3666@piout.net> References: <20210114162432.3039657-1-steen.hegelund@microchip.com> <20210114162432.3039657-2-steen.hegelund@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210114162432.3039657-2-steen.hegelund@microchip.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, Every patches need a commit message, even if in this case it will be very small. On 14/01/2021 17:24:30+0100, Steen Hegelund wrote: > Signed-off-by: Steen Hegelund > --- > .../bindings/reset/microchip,rst.yaml | 59 +++++++++++++++++++ > 1 file changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml > > diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > new file mode 100644 > index 000000000000..af01016e246f > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip Sparx5 Switch Reset Controller > + > +maintainers: > + - Steen Hegelund > + - Lars Povlsen > + > +description: | > + The Microchip Sparx5 Switch provides reset control and implements the following > + functions > + - One Time Switch Core Reset (Soft Reset) > + > +properties: > + $nodename: > + pattern: "^reset-controller@[0-9a-f]+$" > + > + compatible: > + const: microchip,sparx5-switch-reset > + > + reg: > + maxItems: 1 > + > + "#reset-cells": > + const: 1 > + > + cpu-syscon: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: syscon used to access CPU reset > + maxItems: 1 > + > + gcb-syscon: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: syscon used to access Global Control Block > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - "#reset-cells" > + - cpu-syscon > + - gcb-syscon > + > +additionalProperties: false > + > +examples: > + - | > + reset: reset-controller@0 { > + compatible = "microchip,sparx5-switch-reset"; > + reg = <0x0 0x0>; > + #reset-cells = <1>; > + cpu-syscon = <&cpu_ctrl>; > + gcb-syscon = <&gcb_ctrl>; > + }; > + > -- > 2.29.2 > -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com