Re: [PATCH 7/7] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR

[David Gibson <david@gibson.dropbear.id.au>]

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On Tue, Jan 26, 2021 at 06:10:59PM +0100, Cédric Le Goater wrote:
> This to map the PNOR from the machine init handler directly and finish
> the cleanup of the LPC model.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Applied to ppc-for-6.0, thanks.

> ---
>  include/hw/ppc/pnv.h |  1 +
>  hw/ppc/pnv.c         | 11 +++++++++++
>  hw/ppc/pnv_lpc.c     |  7 -------
>  3 files changed, 12 insertions(+), 7 deletions(-)
> 
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index ee7eda3e0102..d69cee17b232 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -58,6 +58,7 @@ struct PnvChip {
>      MemoryRegion xscom;
>      AddressSpace xscom_as;
>  
> +    MemoryRegion *fw_mr;
>      gchar        *dt_isa_nodename;
>  };
>  
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index e500c2e2437e..50810df83815 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -871,6 +871,14 @@ static void pnv_init(MachineState *machine)
>          pnv_ipmi_bt_init(pnv->isa_bus, pnv->bmc, 10);
>      }
>  
> +    /*
> +     * The PNOR is mapped on the LPC FW address space by the BMC.
> +     * Since we can not reach the remote BMC machine with LPC memops,
> +     * map it always for now.
> +     */
> +    memory_region_add_subregion(pnv->chips[0]->fw_mr, PNOR_SPI_OFFSET,
> +                                &pnv->pnor->mmio);
> +
>      /*
>       * OpenPOWER systems use a IPMI SEL Event message to notify the
>       * host to powerdown
> @@ -1150,6 +1158,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
>      qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal);
>      pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs);
>  
> +    chip->fw_mr = &chip8->lpc.isa_fw;
>      chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x",
>                                              (uint64_t) PNV_XSCOM_BASE(chip),
>                                              PNV_XSCOM_LPC_BASE);
> @@ -1479,6 +1488,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>      memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip),
>                                  &chip9->lpc.xscom_regs);
>  
> +    chip->fw_mr = &chip9->lpc.isa_fw;
>      chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
>                                              (uint64_t) PNV9_LPCM_BASE(chip));
>  
> @@ -1592,6 +1602,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
>      memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip),
>                                  &chip10->lpc.xscom_regs);
>  
> +    chip->fw_mr = &chip10->lpc.isa_fw;
>      chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
>                                              (uint64_t) PNV10_LPCM_BASE(chip));
>  }
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index 11739e397b27..bcbca3db9743 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -824,7 +824,6 @@ ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp)
>      ISABus *isa_bus;
>      qemu_irq *irqs;
>      qemu_irq_handler handler;
> -    PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
>  
>      /* let isa_bus_new() create its own bridge on SysBus otherwise
>       * devices specified on the command line won't find the bus and
> @@ -850,11 +849,5 @@ ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp)
>  
>      isa_bus_irqs(isa_bus, irqs);
>  
> -    /*
> -     * TODO: Map PNOR on the LPC FW address space on demand ?
> -     */
> -    memory_region_add_subregion(&lpc->isa_fw, PNOR_SPI_OFFSET,
> -                                &pnv->pnor->mmio);
> -
>      return isa_bus;
>  }

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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