[skeggsb:linux-5.12 6/19] drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:50:1: warning: no previous prototype for 'tu102_mc_intr_unarm'

[kernel test robot <lkp@intel.com>]

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tree:   https://github.com/skeggsb/linux linux-5.12
head:   d1f5a3fc85566e9ddce9361ef180f070367e6eab
commit: c3cc12eaf511a8a47ade42f521534255ef8ffd47 [6/19] drm/nouveau/mc/tu102: Fix MMU fault interrupts on Turing
config: arm-randconfig-r015-20210129 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/skeggsb/linux/commit/c3cc12eaf511a8a47ade42f521534255ef8ffd47
        git remote add skeggsb https://github.com/skeggsb/linux
        git fetch --no-tags skeggsb linux-5.12
        git checkout c3cc12eaf511a8a47ade42f521534255ef8ffd47
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:50:1: warning: no previous prototype for 'tu102_mc_intr_unarm' [-Wmissing-prototypes]
      50 | tu102_mc_intr_unarm(struct nvkm_mc *base)
         | ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:62:1: warning: no previous prototype for 'tu102_mc_intr_rearm' [-Wmissing-prototypes]
      62 | tu102_mc_intr_rearm(struct nvkm_mc *base)
         | ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:74:1: warning: no previous prototype for 'tu102_mc_intr_mask' [-Wmissing-prototypes]
      74 | tu102_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
         | ^~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:132:1: warning: no previous prototype for 'tu102_mc_new_' [-Wmissing-prototypes]
     132 | tu102_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
         | ^~~~~~~~~~~~~


vim +/tu102_mc_intr_unarm +50 drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c

    48	
    49	void
  > 50	tu102_mc_intr_unarm(struct nvkm_mc *base)
    51	{
    52		struct tu102_mc *mc = tu102_mc(base);
    53		unsigned long flags;
    54	
    55		spin_lock_irqsave(&mc->lock, flags);
    56		mc->intr = false;
    57		tu102_mc_intr_update(mc);
    58		spin_unlock_irqrestore(&mc->lock, flags);
    59	}
    60	
    61	void
  > 62	tu102_mc_intr_rearm(struct nvkm_mc *base)
    63	{
    64		struct tu102_mc *mc = tu102_mc(base);
    65		unsigned long flags;
    66	
    67		spin_lock_irqsave(&mc->lock, flags);
    68		mc->intr = true;
    69		tu102_mc_intr_update(mc);
    70		spin_unlock_irqrestore(&mc->lock, flags);
    71	}
    72	
    73	void
  > 74	tu102_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
    75	{
    76		struct tu102_mc *mc = tu102_mc(base);
    77		unsigned long flags;
    78	
    79		spin_lock_irqsave(&mc->lock, flags);
    80		mc->mask = (mc->mask & ~mask) | intr;
    81		tu102_mc_intr_update(mc);
    82		spin_unlock_irqrestore(&mc->lock, flags);
    83	}
    84	
    85	static u32
    86	tu102_mc_intr_stat(struct nvkm_mc *mc)
    87	{
    88		struct nvkm_device *device = mc->subdev.device;
    89		u32 intr0 = nvkm_rd32(device, 0x000100);
    90		u32 intr1 = nvkm_rd32(device, 0x000104);
    91		u32 intr_top = nvkm_rd32(device, 0xb81600);
    92	
    93		/* Turing and above route the MMU fault interrupts via a different
    94		 * interrupt tree with different control registers. For the moment remap
    95		 * them back to the old PMC vector.
    96		 */
    97		if (intr_top & 0x00000006)
    98			intr0 |= 0x00000200;
    99	
   100		return intr0 | intr1;
   101	}
   102	
   103	static void
   104	tu102_mc_intr_hack(struct nvkm_mc *mc, bool *handled)
   105	{
   106		struct nvkm_device *device = mc->subdev.device;
   107		u32 stat = nvkm_rd32(device, 0xb81010);
   108	
   109		if (stat & 0x00000050) {
   110			struct nvkm_subdev *subdev =
   111				nvkm_device_subdev(device, NVKM_SUBDEV_FAULT);
   112			nvkm_wr32(device, 0xb81010, stat & 0x00000050);
   113			if (subdev)
   114				nvkm_subdev_intr(subdev);
   115			*handled = true;
   116		}
   117	}
   118	
   119	static const struct nvkm_mc_func
   120	tu102_mc = {
   121		.init = nv50_mc_init,
   122		.intr = gp100_mc_intr,
   123		.intr_unarm = tu102_mc_intr_unarm,
   124		.intr_rearm = tu102_mc_intr_rearm,
   125		.intr_mask = tu102_mc_intr_mask,
   126		.intr_stat = tu102_mc_intr_stat,
   127		.intr_hack = tu102_mc_intr_hack,
   128		.reset = gk104_mc_reset,
   129	};
   130	
   131	int
 > 132	tu102_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
   133		      int index, struct nvkm_mc **pmc)
   134	{
   135		struct tu102_mc *mc;
   136	
   137		if (!(mc = kzalloc(sizeof(*mc), GFP_KERNEL)))
   138			return -ENOMEM;
   139		nvkm_mc_ctor(func, device, index, &mc->base);
   140		*pmc = &mc->base;
   141	
   142		spin_lock_init(&mc->lock);
   143		mc->intr = false;
   144		mc->mask = 0x7fffffff;
   145		return 0;
   146	}
   147	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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