From: "Michael S. Tsirkin" <mst@redhat.com>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: Thomas Huth <thuth@redhat.com>,
linuxarm@openeuler.org, Vishal Verma <vishal.l.verma@intel.com>,
f.fangjian@huawei.com, Chris Browy <cbrowy@avery-design.com>,
qemu-devel@nongnu.org, f4bug@amsat.org,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Prashant V Agarwal <agpr123@gmail.com>,
Igor Mammedov <imammedo@redhat.com>,
Dan Williams <dan.j.williams@intel.com>,
jcm@redhat.com
Subject: Re: [RFC PATCH 1/4] include/standard-headers/linux/pci_regs: temp hack to add necessary DOE definitions.
Date: Tue, 2 Feb 2021 18:13:47 -0500 [thread overview]
Message-ID: <20210202181305-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20210202153951.2i6qxd63wk5xw2rm@mail.bwidawsk.net>
On Tue, Feb 02, 2021 at 07:39:51AM -0800, Ben Widawsky wrote:
> On 21-02-01 23:16:26, Jonathan Cameron wrote:
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > ---
> > include/standard-headers/linux/pci_regs.h | 33 ++++++++++++++++++++++-
> > 1 file changed, 32 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
> > index e709ae8235..7e852d3dd0 100644
> > --- a/include/standard-headers/linux/pci_regs.h
> > +++ b/include/standard-headers/linux/pci_regs.h
> > @@ -730,7 +730,8 @@
> > #define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
> > #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
> > #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
> > -#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT
> > +#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
> > +#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
> >
> > #define PCI_EXT_CAP_DSN_SIZEOF 12
> > #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
> > @@ -1092,4 +1093,34 @@
> > #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
> > #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
> >
> > +/* Data Object Exchange */
> > +#define PCI_DOE_CAP 0x04
> > +#define PCI_DOE_CAP_INT_SUPPORT 0x00000001
> > +#define PCI_DOE_CAP_INT_MSG_NUM 0x00000FFE
> > +
> > +#define PCI_DOE_CTRL 0x08
> > +#define PCI_DOE_CTRL_DOE_ABORT 0x00000001
> > +#define PCI_DOE_CTRL_DOE_INT_EN 0x00000002
> > +#define PCI_DOE_CTRL_DOE_GO 0x80000000
> > +
> > +#define PCI_DOE_STATUS 0x0c
> > +#define PCI_DOE_STATUS_DOE_BUSY 0x00000001
> > +#define PCI_DOE_STATUS_INT_STATUS 0x00000002
> > +#define PCI_DOE_STATUS_DOE_ERROR 0x00000004
> > +#define PCI_DOE_STATUS_DATA_OBJECT_READY 0x80000000
> > +
> > +#define PCI_DOE_WRITE_MAILBOX 0x10
> > +#define PCI_DOE_READ_MAILBOX 0x14
> > +
> > +/* Data Object Format DOE ECN 6.xx.1 */
> > +#define PCI_DATA_OBJ_DW0_VID 0x0000ffff
> > +#define PCI_DATA_OBJ_DW0_TYPE 0x00ff0000
> > +#define PCI_DATA_OBJ_DW1_LEN 0x0003ffff
> > +
> > +/* DOE Discover Data Object */
> > +#define PCI_DOE_DIS_OBJ_TYPE 0x1
> > +#define PCI_DOE_DIS_REQ_D0_DW0_INDEX 0x000000ff
> > +#define PCI_DOE_DIS_RSP_DO_DW0_VID 0x0000ffff
> > +#define PCI_DOE_DIS_RSP_D0_DW0_PROT 0x00ff0000
> > +#define PCI_DOE_DIS_RSP_D0_DW0_NEXT_INDEX 0xff000000
> > #endif /* LINUX_PCI_REGS_H */
>
> I think a lot of these should have had _MASK at the end.
>
> As for the accuracy of the values, lgtm.
just add them in the source file where they are used.
standard-headers are over-written by scripts, adding
your own macros there won't help.
next prev parent reply other threads:[~2021-02-02 23:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 15:16 [RFC PATCH 0/4] hw/cxl/ + /hw/pci/: PCI DOE + CXL CDAT emulation Jonathan Cameron
2021-02-01 15:16 ` [RFC PATCH 1/4] include/standard-headers/linux/pci_regs: temp hack to add necessary DOE definitions Jonathan Cameron
2021-02-02 15:39 ` Ben Widawsky
2021-02-02 23:13 ` Michael S. Tsirkin [this message]
2021-02-01 15:16 ` [RFC PATCH 2/4] hw/pci/pcie_doe: Introduce utility functions for PCIe DOE Jonathan Cameron
2021-02-02 17:54 ` Ben Widawsky
2021-02-03 18:01 ` Jonathan Cameron
2021-02-01 15:16 ` [RFC PATCH 3/4] hw/cxl/cxl-cdat: Initial CDAT implementation for use by CXL devices Jonathan Cameron
2021-02-02 18:49 ` Ben Widawsky
2021-02-02 19:18 ` [Linuxarm] " Jonathan Cameron
2021-02-01 15:16 ` [RFC PATCH 4/4] hw/mem/cxl_type3: Enabled DOE mailbox for access to CDAT Jonathan Cameron
2021-02-03 17:32 ` [RFC PATCH 0/4] hw/cxl/ + /hw/pci/: PCI DOE + CXL CDAT emulation Jonathan Cameron
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210202181305-mutt-send-email-mst@kernel.org \
--to=mst@redhat.com \
--cc=Jonathan.Cameron@huawei.com \
--cc=agpr123@gmail.com \
--cc=ben@bwidawsk.net \
--cc=cbrowy@avery-design.com \
--cc=dan.j.williams@intel.com \
--cc=f.fangjian@huawei.com \
--cc=f4bug@amsat.org \
--cc=imammedo@redhat.com \
--cc=jcm@redhat.com \
--cc=linuxarm@openeuler.org \
--cc=qemu-devel@nongnu.org \
--cc=thuth@redhat.com \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.