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diff for duplicates of <20210208132315.GF2696@kadam>

diff --git a/a/content_digest b/N1/content_digest
index 384adb9..4784893 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,7 @@
  "From\0Dan Carpenter <dan.carpenter@oracle.com>\0"
  "Subject\0drivers/power/reset/at91-reset.c:260 at91_reset_probe() warn: 'reset->rstc_base' not released on lines: 244.\0"
  "Date\0Mon, 08 Feb 2021 16:23:15 +0300\0"
- "To\0kbuild@lists.01.org\0"
+ "To\0kbuild-all@lists.01.org\0"
  "\01:1\0"
  "b\0"
  "tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master\n"
@@ -173,4 +173,4 @@
  "\215WX\032\235y\207\222\350\a\244\316\321\373\323]w\223\367\357o\003_\221_&\327\235F\253\230\213#\206i\232\tP\213\357\3671\3310\b\237\370\227bhU\210\006\232\266\"\303\213\215\324\202\250\210k\252>\216\214\252\355q>#\321\342\355cT\245nC\342\345p\326#\030v$\363y\242\272\006d#Fu~}\303\023\021\245\234\340\371\277\317/\267_\317\222+n\235\3111\322\371Om\203\025\260\250\021\213T\305\365\207\r\232\005\362\022\306\355w\241\344JBhJ\023I\n"
  ";\027\027\345O\307\3275~\234\260\304\247#\343 R\250J6\355J+Y\326=\325R\3224\350\375\217-U\251\005\215\202\003\276r\251\350\324\0\375\276u\031\344\262\003\224\320\031@5\0p\267c\253!\266\221\236:\001a\253\a\311\220\017\200H\001/\337\0'\227\241<[\220\210K\0240\311\3445\317\341\035h\224\t\206\306\240`e=\201\267h95\017n\264\200\262<\3111<\223\345S\305\366\252\315\240\336\364H\\\213pf\017Q\023\326j\034R\321\ba\334\023\356\312\264\254\323\323\261\240\260\204*@\202K\240\250r:`\032'\340[\f\345\331\313\261\333\270\022WN\352G\0\346\351\316\355\305\3265\031K\230\343\232\336\024\255~\202/\341vp\364\331>+\361\322\245\342\326\030\255\023\265\313\030\016\214C\312\321B4Y\263\255\356\340\270\304&\265[\020~\016\251_^j\025\354\3422\005\271YV\362\371\2034rC\0217\2342B\353\031n\237\264\367\034H\001\201\017L\332\270\037,\301\352<\340\267\232\261>\277R\236cZa\002@V{\361\344\246j\370S\367\027\256\212j\221\306\214\341\324\r\363\240F\323\2252y\377?bI\375W\314k\001\0"
 
-e86f05b5f03086af7296c6078dd4f59222c19a017f7118b02e68cd11ecfda7a8
+5c7b35f16be2de28438ee78752ed32fb0f49345b2a03e855943ada549faaaa62

diff --git a/a/1.txt b/N2/1.txt
index e9a6618..a1559ab 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -19,12 +19,12 @@ ecfe64d8c55f8f Maxime Ripard                2014-07-02  211  	const struct of_de
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  212  	struct device_node *np;
 eacd8d09db7f45 Alexandre Belloni            2015-08-11  213  	int ret, idx = 0;
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  214  
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  215  	reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  216  	if (!reset)
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  217  		return -ENOMEM;
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  218  
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  219  	reset->rstc_base = of_iomap(pdev->dev.of_node, 0);
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  220  	if (!reset->rstc_base) {
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  215  	reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  216  	if (!reset)
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  217  		return -ENOMEM;
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  218  
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  219  	reset->rstc_base = of_iomap(pdev->dev.of_node, 0);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  220  	if (!reset->rstc_base) {
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  221  		dev_err(&pdev->dev, "Could not map reset controller address\n");
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  222  		return -ENODEV;
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  223  	}
@@ -32,8 +32,8 @@ ecfe64d8c55f8f Maxime Ripard                2014-07-02  224
 1ae25d626cfe7e Josh Wu                      2015-07-20  225  	if (!of_device_is_compatible(pdev->dev.of_node, "atmel,sama5d3-rstc")) {
 1ae25d626cfe7e Josh Wu                      2015-07-20  226  		/* we need to shutdown the ddr controller, so get ramc base */
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  227  		for_each_matching_node(np, at91_ramc_of_match) {
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  228  			reset->ramc_base[idx] = of_iomap(np, 0);
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  229  			if (!reset->ramc_base[idx]) {
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  228  			reset->ramc_base[idx] = of_iomap(np, 0);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  229  			if (!reset->ramc_base[idx]) {
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  230  				dev_err(&pdev->dev, "Could not map ram controller address\n");
 c4c0edfbf875a5 Julia Lawall                 2015-11-18  231  				of_node_put(np);
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  232  				return -ENODEV;
@@ -46,25 +46,25 @@ ecfe64d8c55f8f Maxime Ripard                2014-07-02  235  		}
 1ae25d626cfe7e Josh Wu                      2015-07-20  236  	}
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  237  
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  238  	match = of_match_node(at91_reset_of_match, pdev->dev.of_node);
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  239  	reset->nb.notifier_call = match->data;
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  240  	reset->nb.priority = 192;
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  239  	reset->nb.notifier_call = match->data;
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  240  	reset->nb.priority = 192;
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  241  
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  242  	reset->sclk = devm_clk_get(&pdev->dev, NULL);
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  243  	if (IS_ERR(reset->sclk))
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  244  		return PTR_ERR(reset->sclk);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  242  	reset->sclk = devm_clk_get(&pdev->dev, NULL);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  243  	if (IS_ERR(reset->sclk))
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  244  		return PTR_ERR(reset->sclk);
 
 Etc.  These should probably unmap reset->ramc_base[].
 
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  245  
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  246  	ret = clk_prepare_enable(reset->sclk);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  246  	ret = clk_prepare_enable(reset->sclk);
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  247  	if (ret) {
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  248  		dev_err(&pdev->dev, "Could not enable slow clock\n");
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  249  		return ret;
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  250  	}
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  251  
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  252  	ret = register_restart_handler(&reset->nb);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  252  	ret = register_restart_handler(&reset->nb);
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  253  	if (ret) {
-b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  254  		clk_disable_unprepare(reset->sclk);
+b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  254  		clk_disable_unprepare(reset->sclk);
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  255  		return ret;
 2b2c6148fe8510 Alexandre Belloni            2015-08-11  256  	}
 ecfe64d8c55f8f Maxime Ripard                2014-07-02  257  
@@ -75,4 +75,4 @@ ecfe64d8c55f8f Maxime Ripard                2014-07-02  261  }
 
 ---
 0-DAY CI Kernel Test Service, Intel Corporation
-https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
+https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/a/2.hdr b/N2/2.hdr
index 1a878f0..498182a 100644
--- a/a/2.hdr
+++ b/N2/2.hdr
@@ -1,4 +1,3 @@
 Content-Type: application/gzip
-MIME-Version: 1.0
+Content-Disposition: attachment; filename=".config.gz"
 Content-Transfer-Encoding: base64
-Content-Disposition: attachment; filename="config.gz"
diff --git a/a/content_digest b/N2/content_digest
index 384adb9..ef7fcd8 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,7 +1,13 @@
  "From\0Dan Carpenter <dan.carpenter@oracle.com>\0"
  "Subject\0drivers/power/reset/at91-reset.c:260 at91_reset_probe() warn: 'reset->rstc_base' not released on lines: 244.\0"
- "Date\0Mon, 08 Feb 2021 16:23:15 +0300\0"
- "To\0kbuild@lists.01.org\0"
+ "Date\0Mon, 8 Feb 2021 16:23:15 +0300\0"
+ "To\0kbuild@lists.01.org"
+ " Claudiu.Beznea <Claudiu.Beznea@microchip.com>\0"
+ "Cc\0lkp@intel.com"
+  kbuild-all@lists.01.org
+  linux-kernel@vger.kernel.org
+  Sebastian Reichel <sebastian.reichel@collabora.com>
+ " Claudiu Beznea <claudiu.beznea@microchip.com>\0"
  "\01:1\0"
  "b\0"
  "tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master\n"
@@ -25,12 +31,12 @@
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  212  \tstruct device_node *np;\n"
  "eacd8d09db7f45 Alexandre Belloni            2015-08-11  213  \tint ret, idx = 0;\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  214  \n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  215  \treset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  216  \tif (!reset)\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  217  \t\treturn -ENOMEM;\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  218  \n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  219  \treset->rstc_base = of_iomap(pdev->dev.of_node, 0);\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  220  \tif (!reset->rstc_base) {\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  215  \treset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  216  \tif (!reset)\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  217  \t\treturn -ENOMEM;\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  218  \n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  219  \treset->rstc_base = of_iomap(pdev->dev.of_node, 0);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  220  \tif (!reset->rstc_base) {\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  221  \t\tdev_err(&pdev->dev, \"Could not map reset controller address\\n\");\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  222  \t\treturn -ENODEV;\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  223  \t}\n"
@@ -38,8 +44,8 @@
  "1ae25d626cfe7e Josh Wu                      2015-07-20  225  \tif (!of_device_is_compatible(pdev->dev.of_node, \"atmel,sama5d3-rstc\")) {\n"
  "1ae25d626cfe7e Josh Wu                      2015-07-20  226  \t\t/* we need to shutdown the ddr controller, so get ramc base */\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  227  \t\tfor_each_matching_node(np, at91_ramc_of_match) {\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  228  \t\t\treset->ramc_base[idx] = of_iomap(np, 0);\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  229  \t\t\tif (!reset->ramc_base[idx]) {\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  228  \t\t\treset->ramc_base[idx] = of_iomap(np, 0);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  229  \t\t\tif (!reset->ramc_base[idx]) {\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  230  \t\t\t\tdev_err(&pdev->dev, \"Could not map ram controller address\\n\");\n"
  "c4c0edfbf875a5 Julia Lawall                 2015-11-18  231  \t\t\t\tof_node_put(np);\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  232  \t\t\t\treturn -ENODEV;\n"
@@ -52,25 +58,25 @@
  "1ae25d626cfe7e Josh Wu                      2015-07-20  236  \t}\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  237  \n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  238  \tmatch = of_match_node(at91_reset_of_match, pdev->dev.of_node);\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  239  \treset->nb.notifier_call = match->data;\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  240  \treset->nb.priority = 192;\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  239  \treset->nb.notifier_call = match->data;\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  240  \treset->nb.priority = 192;\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  241  \n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  242  \treset->sclk = devm_clk_get(&pdev->dev, NULL);\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  243  \tif (IS_ERR(reset->sclk))\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  244  \t\treturn PTR_ERR(reset->sclk);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  242  \treset->sclk = devm_clk_get(&pdev->dev, NULL);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  243  \tif (IS_ERR(reset->sclk))\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  244  \t\treturn PTR_ERR(reset->sclk);\n"
  "\n"
  "Etc.  These should probably unmap reset->ramc_base[].\n"
  "\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  245  \n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  246  \tret = clk_prepare_enable(reset->sclk);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  246  \tret = clk_prepare_enable(reset->sclk);\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  247  \tif (ret) {\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  248  \t\tdev_err(&pdev->dev, \"Could not enable slow clock\\n\");\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  249  \t\treturn ret;\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  250  \t}\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  251  \n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  252  \tret = register_restart_handler(&reset->nb);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  252  \tret = register_restart_handler(&reset->nb);\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  253  \tif (ret) {\n"
- "b7967b7919f0e3 Claudiu.Beznea(a)microchip.com 2020-01-21  254  \t\tclk_disable_unprepare(reset->sclk);\n"
+ "b7967b7919f0e3 Claudiu.Beznea@microchip.com 2020-01-21  254  \t\tclk_disable_unprepare(reset->sclk);\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  255  \t\treturn ret;\n"
  "2b2c6148fe8510 Alexandre Belloni            2015-08-11  256  \t}\n"
  "ecfe64d8c55f8f Maxime Ripard                2014-07-02  257  \n"
@@ -81,9 +87,9 @@
  "\n"
  "---\n"
  "0-DAY CI Kernel Test Service, Intel Corporation\n"
- https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
+ https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
  "\01:2\0"
- "fn\0config.gz\0"
+ "fn\0.config.gz\0"
  "b\0"
  "\037\213\b\b\034D\036`\0\003.config\0\224<i\217\343\266\222\337\363+\204\004X\344\341\2413\266\373\336E\177\240$\312f,\211\032\221\362\321_\004O\267fb\304m\367\332\356\274\314\277\337*\352\"%\312\223\rr\214\253\212W\261\356\242\362\313O\2778\344\343|x\333\234\267/\233\335\356\273\363\255\330\027\307\315\271xu\276nw\305\3778>wb.\035\3523\371\033\020\207\333\375\307\337\2376\3077\347\366\267\273\337FW\307\227\2613/\216\373b\347x\207\375\327\355\267\017\030\274=\354\177\372\345'\370\373\027\0\276\275\303<\307\377v`\314\325\016G_}\333\177\024\233/\333\253o//\316\257S\317\373\227\363\370\333\365o#\240\367x\034\260i\356y9\0239`\236\276\327 \370\221/h*\030\217\237\036G\327\243QC\033\222x\332\240F\332\0243\"r\"\242|\312%o'\322\020,\016YL{\250%I\343<\"k\227\346Y\314b&\031\t\3313\365\rB\237\t\342\206\364\037\020\263\364s\276\344\351\034 \212#S\305\340\235s*\316\037\357\355\231\335\224\317i\234\3638\027Q\242\215\206)s\032/r\222N\363\220EL>]O\232}\360(a\260\tI\205l\207\204\334#a\315\220\237\177n\026\310X\350\347\202\204R\003\316\310\202\346s\232\3064\314\247\317L[X\307\204\317\021\261cV\317C#\370\020\342\006\020 \027%J[\332\331\236\234\375\341\214|\351\341q\003\227\360\253\347\313\243\271\216\356\"o\332\235\3724 Y(\363\031\0272&\021}\372\371\327\375a_\374\253\341\227X\213\005K4\271\314\004\r\231\3339+I\275YN2P\031\240\207\313\b\353\273\aYpN\037_N\337O\347\342\255\275\373)\215i\312<%*I\312]M&u\224\230\361\3450&\017\351\202\206\372NR\037p\"\027\313<\245\202\306\276}\2547\323\257\035!>\217\b\213m\260|\306h\212\247[\353\353\304>\310`E\0\264\346\300\200\247\036\365s9K)\361Y<m\261\"!\251\240\325\210\346\316\364\255\371\324\315\246\2010\357\266\330\277:\207\257\035V\326s*\316{\240\001s\3013X8\367\211$\375s+\n"
  "`W,E}5r\373V\034O\266\333\231=\347\t\214\342>\363\364\215\306\0341\f\316n\021.\370\217\244+\231\313\224xs\343\324]L\311\240\336\304Vy\236\261\351\f\3572\227,\002\375\266\362\245w\216vx\222R\032%\022\026\210m{\256\321\v\036f\261$\351Z\337T\205\2740\314\3430\252\346\246\227d\237\344\346\364\247s\206\3558\033\330\332\351\2749\237\234\315\313\313\341c\177\336\356\277\265\374]\260\024F'YN<5G\311\256fe\311\274y\am\331\205e\022\274mS\026\221m\346*\365\031\0043\016+Xc\n"
@@ -173,4 +179,4 @@
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-e86f05b5f03086af7296c6078dd4f59222c19a017f7118b02e68cd11ecfda7a8
+08b97ed65d5b00e264dd61f28418410f77c00576c20d47bfc7cdced5053e34ba

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