Re: [PATCH v2 10/11] mips: Implement setjmp/longjmp/initjmp

From: Peter Mamonov <pmamonov@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>,
	barebox@lists.infradead.org, Jules Maselbas <jmaselbas@kalray.eu>,
	Stafford Horne <shorne@gmail.com>
Subject: Re: [PATCH v2 10/11] mips: Implement setjmp/longjmp/initjmp
Date: Sun, 7 Mar 2021 15:00:57 +0300	[thread overview]
Message-ID: <20210307120056.GD1407@chr> (raw)
In-Reply-To: <20210304083811.GO5549@pengutronix.de>

On Thu, Mar 04, 2021 at 09:38:11AM +0100, Sascha Hauer wrote:
> Hi Peter,
> 
> On Wed, Mar 03, 2021 at 01:19:26AM +0300, Peter Mamonov wrote:
> > Hi, Sascha and Ahmad,
> > 
> > On Mon, Mar 01, 2021 at 12:01:05PM +0100, Ahmad Fatoum wrote:
> > > From: Sascha Hauer <s.hauer@pengutronix.de>
> > > 
> > > The header has been taken from glibc, the implementation itself is based
> > > on the newlib implementation.
> > > 
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> > > ---
> > >  arch/mips/Kconfig              |  1 +
> > >  arch/mips/include/asm/setjmp.h | 32 ++++++++++++++++++++++
> > >  arch/mips/lib/Makefile         |  1 +
> > >  arch/mips/lib/setjmp.S         | 50 ++++++++++++++++++++++++++++++++++
> > >  4 files changed, 84 insertions(+)
> > >  create mode 100644 arch/mips/include/asm/setjmp.h
> > >  create mode 100644 arch/mips/lib/setjmp.S
> > > 
> > > ...
> > >
> > > diff --git a/arch/mips/lib/setjmp.S b/arch/mips/lib/setjmp.S
> > > new file mode 100644
> > > index 000000000000..b09a7c55293c
> > > --- /dev/null
> > > +++ b/arch/mips/lib/setjmp.S
> > > @@ -0,0 +1,50 @@
> > > +/* SPDX-License-Identifier: GPL-2.0-only */
> > > +
> > > +#include <asm/regdef.h>
> > > +#include <asm/asm.h>
> > > +#include <linux/linkage.h>
> > > +
> > > +/* int setjmp (jmp_buf);  */
> > > +LEAF(setjmp)
> > > +	sw	ra, (0 * 4)(a0)
> > > +	sw	sp, (1 * 4)(a0)
> > > +	sw	s0, (2 * 4)(a0)
> > > +	sw	s1, (3 * 4)(a0)
> > > +	sw	s2, (4 * 4)(a0)
> > > +	sw	s3, (5 * 4)(a0)
> > > +	sw	s4, (6 * 4)(a0)
> > > +	sw	s5, (7 * 4)(a0)
> > > +	sw	s6, (8 * 4)(a0)
> > > +	sw	s7, (9 * 4)(a0)
> > > +	sw	fp, (10 * 4)(a0)
> > > +	move	v0, zero
> > > +	j	ra
> > > +END(setjmp)
> > > +
> > > +/* volatile void longjmp (jmp_buf, int);  */
> > > +LEAF(longjmp)
> > > +	lw	ra, (0 * 4)(a0)
> > > +	lw	sp, (1 * 4)(a0)
> > > +	lw	s0, (2 * 4)(a0)
> > > +	lw	s1, (3 * 4)(a0)
> > > +	lw	s2, (4 * 4)(a0)
> > > +	lw	s3, (5 * 4)(a0)
> > > +	lw	s4, (6 * 4)(a0)
> > > +	lw	s5, (7 * 4)(a0)
> > > +	lw	s6, (8 * 4)(a0)
> > > +	lw	s7, (9 * 4)(a0)
> > > +	lw	fp, (10 * 4)(a0)
> > > +	bne	a1, zero, 1f
> > > +	li	a1, 1
> > > +1:
> > > +	move	v0, a1
> > > +	j	ra
> > > +END(longjmp)
> > > +
> > > +/* int initjmp(jmp_buf jmp, void __noreturn (*func)(void), void *stack_top); */
> > > +LEAF(initjmp)
> > > +	sw	a1, (0 * 4)(a0)
> > > +	sw	a2, (1 * 4)(a0)
> > > +	move	v0, zero
> > > +	j	ra
> > > +END(initjmp)
> > 
> > I would suggest using `REG_S/REG_L r, (n * SZREG)(a0)` here for the sake of 
> > MIPS64 targets. See arch/mips/include/asm/asm.h:272.
> 
> I agree with you, but barebox doesn't support MIPS64 currently and I
> wasn't confident enough to add such things when I can't test them.

Well, what can possibly go wrong? =) Actually you've used this approach for RV: 
http://lists.infradead.org/pipermail/barebox/2021-March/035173.html.

> Maybe we can add a
> 
> #if SZREG != 4
> #error setjmp/longjmp currently only supports 32bit targets
> #endif

Definitely it's better than random fails after context switch in runtime.

Regards,
Peter

> Sascha
> > -- > Pengutronix e.K.                           |                             
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