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Mon, 8 Mar 2021 22:54:23 +0000 (GMT) Received: from v0005c16.aus.stglabs.ibm.com (unknown [9.211.41.147]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Mon, 8 Mar 2021 22:54:23 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH linux dev-5.10 13/35] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Date: Mon, 8 Mar 2021 16:53:57 -0600 Message-Id: <20210308225419.46530-14-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210308225419.46530-1-eajames@linux.ibm.com> References: <20210308225419.46530-1-eajames@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-08_20:2021-03-08, 2021-03-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 impostorscore=0 mlxlogscore=969 malwarescore=0 mlxscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103080118 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" From: Andrew Jeffery Add properties to control the phase delay for input and output data sampling. Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml index 987b287f3bff..ebcb9ed4e308 100644 --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -37,6 +37,14 @@ properties: clocks: maxItems: 1 description: The SD/SDIO controller clock gate + "aspeed,input-phase": + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + The input clock phase delay value. + "aspeed,output-phase": + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + The output clock phase delay value. patternProperties: "^sdhci@[0-9a-f]+$": -- 2.27.0