From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Yevgeny Kliteynik <kliteyn@nvidia.com>,
Dan Carpenter <dan.carpenter@oracle.com>,
Alex Vesker <valex@nvidia.com>,
Saeed Mahameed <saeedm@nvidia.com>
Subject: [net-next 02/15] net/mlx5: DR, Fix potential shift wrapping of 32-bit value in STEv1 getter
Date: Wed, 24 Mar 2021 22:04:25 -0700 [thread overview]
Message-ID: <20210325050438.261511-3-saeed@kernel.org> (raw)
In-Reply-To: <20210325050438.261511-1-saeed@kernel.org>
From: Yevgeny Kliteynik <kliteyn@nvidia.com>
Fix 32-bit variable shift wrapping in dr_ste_v1_get_miss_addr.
Fixes: a6098129c781 ("net/mlx5: DR, Add STEv1 setters and getters")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c
index 815951617e7c..616ebc38381a 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c
@@ -264,8 +264,8 @@ static void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr)
static u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p)
{
u64 index =
- (MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6) |
- MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32) << 26);
+ ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6) |
+ ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32)) << 26);
return index << 6;
}
--
2.30.2
next prev parent reply other threads:[~2021-03-25 5:05 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 5:04 [pull request][net-next 00/15] mlx5 updates 2021-03-24 Saeed Mahameed
2021-03-25 5:04 ` [net-next 01/15] net/mlx5e: Enforce minimum value check for ICOSQ size Saeed Mahameed
2021-03-25 5:04 ` Saeed Mahameed [this message]
2021-03-25 5:04 ` [net-next 03/15] net/mlx5e: alloc the correct size for indirection_rqt Saeed Mahameed
2021-03-25 5:04 ` [net-next 04/15] net/mlx5e: Pass q_counter indentifier as parameter to rq_param builders Saeed Mahameed
2021-03-25 5:04 ` [net-next 05/15] net/mlx5e: Move params logic into its dedicated file Saeed Mahameed
2021-03-25 23:44 ` David Miller
2021-03-25 5:04 ` [net-next 06/15] net/mlx5e: Restrict usage of mlx5e_priv in params logic functions Saeed Mahameed
2021-03-25 5:04 ` [net-next 07/15] net/mlx5e: Allow creating mpwqe info without channel Saeed Mahameed
2021-03-25 5:04 ` [net-next 08/15] net/mlx5: Add helper to set time-stamp translator on a queue Saeed Mahameed
2021-03-25 5:04 ` [net-next 09/15] net/mlx5e: Generalize open RQ Saeed Mahameed
2021-03-25 5:04 ` [net-next 10/15] net/mlx5e: Generalize RQ activation Saeed Mahameed
2021-03-25 5:04 ` [net-next 11/15] net/mlx5e: Generalize close RQ Saeed Mahameed
2021-03-25 5:04 ` [net-next 12/15] net/mlx5e: Generalize direct-TIRs and direct-RQTs API Saeed Mahameed
2021-03-25 5:04 ` [net-next 13/15] net/mlx5e: Generalize PTP implementation Saeed Mahameed
2021-03-25 5:04 ` [net-next 14/15] net/mlx5e: Cleanup PTP Saeed Mahameed
2021-03-25 5:04 ` [net-next 15/15] net/mlx5: Fix spelling mistakes in mlx5_core_info message Saeed Mahameed
2021-03-25 23:43 ` [pull request][net-next 00/15] mlx5 updates 2021-03-24 David Miller
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