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diff for duplicates of <20210329150020.13632-7-eajames@linux.ibm.com>

diff --git a/a/1.txt b/N1/1.txt
index 71a77ff..974ceee 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -350,11 +350,11 @@ index 016b0ead5404..b47b7b995170 100644
  	};
  
  };
-@@ -1314,6 +1644,366 @@ gpio at 7 {
+@@ -1314,6 +1644,366 @@ gpio@7 {
  		};
  	};
  
-+	pic1: pca9952 at 32 {
++	pic1: pca9952@32 {
 +		compatible = "ibm,pca9552";
 +		reg = <0x32>;
 +		#address-cells = <1>;
@@ -363,88 +363,88 @@ index 016b0ead5404..b47b7b995170 100644
 +		gpio-controller;
 +		#gpio-cells = <2>;
 +
-+		gpio at 0 {
++		gpio@0 {
 +			reg = <0>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 1 {
++		gpio@1 {
 +			reg = <1>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 2 {
++		gpio@2 {
 +			reg = <2>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 3 {
++		gpio@3 {
 +			reg = <3>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 4 {
++		gpio@4 {
 +			reg = <4>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 5 {
++		gpio@5 {
 +			reg = <5>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 6 {
++		gpio@6 {
 +			reg = <6>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 7 {
++		gpio@7 {
 +			reg = <7>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 8 {
++		gpio@8 {
 +			reg = <8>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 9 {
++		gpio@9 {
 +			reg = <9>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 10 {
++		gpio@10 {
 +			reg = <10>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 11 {
++		gpio@11 {
 +			reg = <11>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 12 {
++		gpio@12 {
 +			reg = <12>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 13 {
++		gpio@13 {
 +			reg = <13>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 14 {
++		gpio@14 {
 +			reg = <14>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 15 {
++		gpio@15 {
 +			reg = <15>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +	};
 +
-+	pic2: pca9552 at 31 {
++	pic2: pca9552@31 {
 +		compatible = "ibm,pca9552";
 +		reg = <0x31>;
 +		#address-cells = <1>;
@@ -453,88 +453,88 @@ index 016b0ead5404..b47b7b995170 100644
 +		gpio-controller;
 +		#gpio-cells = <2>;
 +
-+		gpio at 0 {
++		gpio@0 {
 +			reg = <0>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 1 {
++		gpio@1 {
 +			reg = <1>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 2 {
++		gpio@2 {
 +			reg = <2>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 3 {
++		gpio@3 {
 +			reg = <3>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 4 {
++		gpio@4 {
 +			reg = <4>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 5 {
++		gpio@5 {
 +			reg = <5>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 6 {
++		gpio@6 {
 +			reg = <6>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 7 {
++		gpio@7 {
 +			reg = <7>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 8 {
++		gpio@8 {
 +			reg = <8>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 9 {
++		gpio@9 {
 +			reg = <9>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 10 {
++		gpio@10 {
 +			reg = <10>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 11 {
++		gpio@11 {
 +			reg = <11>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 12 {
++		gpio@12 {
 +			reg = <12>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 13 {
++		gpio@13 {
 +			reg = <13>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 14 {
++		gpio@14 {
 +			reg = <14>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 15 {
++		gpio@15 {
 +			reg = <15>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +	};
 +
-+	pic3: pca9552 at 30 {
++	pic3: pca9552@30 {
 +		compatible = "ibm,pca9552";
 +		reg = <0x30>;
 +		#address-cells = <1>;
@@ -543,88 +543,88 @@ index 016b0ead5404..b47b7b995170 100644
 +		gpio-controller;
 +		#gpio-cells = <2>;
 +
-+		gpio at 0 {
++		gpio@0 {
 +			reg = <0>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 1 {
++		gpio@1 {
 +			reg = <1>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 2 {
++		gpio@2 {
 +			reg = <2>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 3 {
++		gpio@3 {
 +			reg = <3>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 4 {
++		gpio@4 {
 +			reg = <4>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 5 {
++		gpio@5 {
 +			reg = <5>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 6 {
++		gpio@6 {
 +			reg = <6>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 7 {
++		gpio@7 {
 +			reg = <7>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 8 {
++		gpio@8 {
 +			reg = <8>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 9 {
++		gpio@9 {
 +			reg = <9>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 10 {
++		gpio@10 {
 +			reg = <10>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 11 {
++		gpio@11 {
 +			reg = <11>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 12 {
++		gpio@12 {
 +			reg = <12>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 13 {
++		gpio@13 {
 +			reg = <13>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 14 {
++		gpio@14 {
 +			reg = <14>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 15 {
++		gpio@15 {
 +			reg = <15>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +	};
 +
-+	pic4: pca9552 at 33 {
++	pic4: pca9552@33 {
 +		compatible = "ibm,pca9552";
 +		reg = <0x33>;
 +		#address-cells = <1>;
@@ -633,88 +633,88 @@ index 016b0ead5404..b47b7b995170 100644
 +		gpio-controller;
 +		#gpio-cells = <2>;
 +
-+		gpio at 0 {
++		gpio@0 {
 +			reg = <0>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 1 {
++		gpio@1 {
 +			reg = <1>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 2 {
++		gpio@2 {
 +			reg = <2>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 3 {
++		gpio@3 {
 +			reg = <3>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 4 {
++		gpio@4 {
 +			reg = <4>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 5 {
++		gpio@5 {
 +			reg = <5>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 6 {
++		gpio@6 {
 +			reg = <6>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 7 {
++		gpio@7 {
 +			reg = <7>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 8 {
++		gpio@8 {
 +			reg = <8>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 9 {
++		gpio@9 {
 +			reg = <9>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 10 {
++		gpio@10 {
 +			reg = <10>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 11 {
++		gpio@11 {
 +			reg = <11>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 12 {
++		gpio@12 {
 +			reg = <12>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 13 {
++		gpio@13 {
 +			reg = <13>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 14 {
++		gpio@14 {
 +			reg = <14>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +
-+		gpio at 15 {
++		gpio@15 {
 +			reg = <15>;
 +			type = <PCA955X_TYPE_GPIO>;
 +		};
 +	};
 +
- 	dps: dps310 at 76 {
+ 	dps: dps310@76 {
  		compatible = "infineon,dps310";
  		reg = <0x76>;
 -- 
diff --git a/a/content_digest b/N1/content_digest
index 2b09a4c..63e8958 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,7 +2,13 @@
  "From\0Eddie James <eajames@linux.ibm.com>\0"
  "Subject\0[PATCH 06/22] ARM: dts: aspeed: rainier: Add leds that are off pic16f882\0"
  "Date\0Mon, 29 Mar 2021 10:00:04 -0500\0"
- "To\0linux-aspeed@lists.ozlabs.org\0"
+ "To\0joel@jms.id.au\0"
+ "Cc\0andrew@aj.id.au"
+  robh+dt@kernel.org
+  devicetree@vger.kernel.org
+  linux-aspeed@lists.ozlabs.org
+  Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
+ " Eddie James <eajames@linux.ibm.com>\0"
  "\00:1\0"
  "b\0"
  "From: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>\n"
@@ -357,11 +363,11 @@
  " \t};\n"
  " \n"
  " };\n"
- "@@ -1314,6 +1644,366 @@ gpio at 7 {\n"
+ "@@ -1314,6 +1644,366 @@ gpio@7 {\n"
  " \t\t};\n"
  " \t};\n"
  " \n"
- "+\tpic1: pca9952 at 32 {\n"
+ "+\tpic1: pca9952@32 {\n"
  "+\t\tcompatible = \"ibm,pca9552\";\n"
  "+\t\treg = <0x32>;\n"
  "+\t\t#address-cells = <1>;\n"
@@ -370,88 +376,88 @@
  "+\t\tgpio-controller;\n"
  "+\t\t#gpio-cells = <2>;\n"
  "+\n"
- "+\t\tgpio at 0 {\n"
+ "+\t\tgpio@0 {\n"
  "+\t\t\treg = <0>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 1 {\n"
+ "+\t\tgpio@1 {\n"
  "+\t\t\treg = <1>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 2 {\n"
+ "+\t\tgpio@2 {\n"
  "+\t\t\treg = <2>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 3 {\n"
+ "+\t\tgpio@3 {\n"
  "+\t\t\treg = <3>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4 {\n"
+ "+\t\tgpio@4 {\n"
  "+\t\t\treg = <4>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 5 {\n"
+ "+\t\tgpio@5 {\n"
  "+\t\t\treg = <5>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 6 {\n"
+ "+\t\tgpio@6 {\n"
  "+\t\t\treg = <6>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 7 {\n"
+ "+\t\tgpio@7 {\n"
  "+\t\t\treg = <7>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 8 {\n"
+ "+\t\tgpio@8 {\n"
  "+\t\t\treg = <8>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 9 {\n"
+ "+\t\tgpio@9 {\n"
  "+\t\t\treg = <9>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 10 {\n"
+ "+\t\tgpio@10 {\n"
  "+\t\t\treg = <10>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 11 {\n"
+ "+\t\tgpio@11 {\n"
  "+\t\t\treg = <11>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 12 {\n"
+ "+\t\tgpio@12 {\n"
  "+\t\t\treg = <12>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 13 {\n"
+ "+\t\tgpio@13 {\n"
  "+\t\t\treg = <13>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 14 {\n"
+ "+\t\tgpio@14 {\n"
  "+\t\t\treg = <14>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 15 {\n"
+ "+\t\tgpio@15 {\n"
  "+\t\t\treg = <15>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\t};\n"
  "+\n"
- "+\tpic2: pca9552 at 31 {\n"
+ "+\tpic2: pca9552@31 {\n"
  "+\t\tcompatible = \"ibm,pca9552\";\n"
  "+\t\treg = <0x31>;\n"
  "+\t\t#address-cells = <1>;\n"
@@ -460,88 +466,88 @@
  "+\t\tgpio-controller;\n"
  "+\t\t#gpio-cells = <2>;\n"
  "+\n"
- "+\t\tgpio at 0 {\n"
+ "+\t\tgpio@0 {\n"
  "+\t\t\treg = <0>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 1 {\n"
+ "+\t\tgpio@1 {\n"
  "+\t\t\treg = <1>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 2 {\n"
+ "+\t\tgpio@2 {\n"
  "+\t\t\treg = <2>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 3 {\n"
+ "+\t\tgpio@3 {\n"
  "+\t\t\treg = <3>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4 {\n"
+ "+\t\tgpio@4 {\n"
  "+\t\t\treg = <4>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 5 {\n"
+ "+\t\tgpio@5 {\n"
  "+\t\t\treg = <5>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 6 {\n"
+ "+\t\tgpio@6 {\n"
  "+\t\t\treg = <6>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 7 {\n"
+ "+\t\tgpio@7 {\n"
  "+\t\t\treg = <7>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 8 {\n"
+ "+\t\tgpio@8 {\n"
  "+\t\t\treg = <8>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 9 {\n"
+ "+\t\tgpio@9 {\n"
  "+\t\t\treg = <9>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 10 {\n"
+ "+\t\tgpio@10 {\n"
  "+\t\t\treg = <10>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 11 {\n"
+ "+\t\tgpio@11 {\n"
  "+\t\t\treg = <11>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 12 {\n"
+ "+\t\tgpio@12 {\n"
  "+\t\t\treg = <12>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 13 {\n"
+ "+\t\tgpio@13 {\n"
  "+\t\t\treg = <13>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 14 {\n"
+ "+\t\tgpio@14 {\n"
  "+\t\t\treg = <14>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 15 {\n"
+ "+\t\tgpio@15 {\n"
  "+\t\t\treg = <15>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\t};\n"
  "+\n"
- "+\tpic3: pca9552 at 30 {\n"
+ "+\tpic3: pca9552@30 {\n"
  "+\t\tcompatible = \"ibm,pca9552\";\n"
  "+\t\treg = <0x30>;\n"
  "+\t\t#address-cells = <1>;\n"
@@ -550,88 +556,88 @@
  "+\t\tgpio-controller;\n"
  "+\t\t#gpio-cells = <2>;\n"
  "+\n"
- "+\t\tgpio at 0 {\n"
+ "+\t\tgpio@0 {\n"
  "+\t\t\treg = <0>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 1 {\n"
+ "+\t\tgpio@1 {\n"
  "+\t\t\treg = <1>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 2 {\n"
+ "+\t\tgpio@2 {\n"
  "+\t\t\treg = <2>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 3 {\n"
+ "+\t\tgpio@3 {\n"
  "+\t\t\treg = <3>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4 {\n"
+ "+\t\tgpio@4 {\n"
  "+\t\t\treg = <4>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 5 {\n"
+ "+\t\tgpio@5 {\n"
  "+\t\t\treg = <5>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 6 {\n"
+ "+\t\tgpio@6 {\n"
  "+\t\t\treg = <6>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 7 {\n"
+ "+\t\tgpio@7 {\n"
  "+\t\t\treg = <7>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 8 {\n"
+ "+\t\tgpio@8 {\n"
  "+\t\t\treg = <8>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 9 {\n"
+ "+\t\tgpio@9 {\n"
  "+\t\t\treg = <9>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 10 {\n"
+ "+\t\tgpio@10 {\n"
  "+\t\t\treg = <10>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 11 {\n"
+ "+\t\tgpio@11 {\n"
  "+\t\t\treg = <11>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 12 {\n"
+ "+\t\tgpio@12 {\n"
  "+\t\t\treg = <12>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 13 {\n"
+ "+\t\tgpio@13 {\n"
  "+\t\t\treg = <13>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 14 {\n"
+ "+\t\tgpio@14 {\n"
  "+\t\t\treg = <14>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 15 {\n"
+ "+\t\tgpio@15 {\n"
  "+\t\t\treg = <15>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\t};\n"
  "+\n"
- "+\tpic4: pca9552 at 33 {\n"
+ "+\tpic4: pca9552@33 {\n"
  "+\t\tcompatible = \"ibm,pca9552\";\n"
  "+\t\treg = <0x33>;\n"
  "+\t\t#address-cells = <1>;\n"
@@ -640,91 +646,91 @@
  "+\t\tgpio-controller;\n"
  "+\t\t#gpio-cells = <2>;\n"
  "+\n"
- "+\t\tgpio at 0 {\n"
+ "+\t\tgpio@0 {\n"
  "+\t\t\treg = <0>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 1 {\n"
+ "+\t\tgpio@1 {\n"
  "+\t\t\treg = <1>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 2 {\n"
+ "+\t\tgpio@2 {\n"
  "+\t\t\treg = <2>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 3 {\n"
+ "+\t\tgpio@3 {\n"
  "+\t\t\treg = <3>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4 {\n"
+ "+\t\tgpio@4 {\n"
  "+\t\t\treg = <4>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 5 {\n"
+ "+\t\tgpio@5 {\n"
  "+\t\t\treg = <5>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 6 {\n"
+ "+\t\tgpio@6 {\n"
  "+\t\t\treg = <6>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 7 {\n"
+ "+\t\tgpio@7 {\n"
  "+\t\t\treg = <7>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 8 {\n"
+ "+\t\tgpio@8 {\n"
  "+\t\t\treg = <8>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 9 {\n"
+ "+\t\tgpio@9 {\n"
  "+\t\t\treg = <9>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 10 {\n"
+ "+\t\tgpio@10 {\n"
  "+\t\t\treg = <10>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 11 {\n"
+ "+\t\tgpio@11 {\n"
  "+\t\t\treg = <11>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 12 {\n"
+ "+\t\tgpio@12 {\n"
  "+\t\t\treg = <12>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 13 {\n"
+ "+\t\tgpio@13 {\n"
  "+\t\t\treg = <13>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 14 {\n"
+ "+\t\tgpio@14 {\n"
  "+\t\t\treg = <14>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 15 {\n"
+ "+\t\tgpio@15 {\n"
  "+\t\t\treg = <15>;\n"
  "+\t\t\ttype = <PCA955X_TYPE_GPIO>;\n"
  "+\t\t};\n"
  "+\t};\n"
  "+\n"
- " \tdps: dps310 at 76 {\n"
+ " \tdps: dps310@76 {\n"
  " \t\tcompatible = \"infineon,dps310\";\n"
  " \t\treg = <0x76>;\n"
  "-- \n"
  2.27.0
 
-382109ec8bb7f9aae3034a6ddd07111311dc673bc127453bdc5d53b63c34c1b2
+2abe62dd6492f0d9b3f3b550cee77dd5de64ab6063dd2ed7e7edb6dff27d0764

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