Re: [PATCH v3 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver

[kernel test robot <lkp@intel.com>]

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Hi Greentime,

I love your patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on pci/next robh/for-next v5.12-rc5 next-20210331]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Greentime-Hu/Add-SiFive-FU740-PCIe-host-controller-driver-support/20210331-172909
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/c1d210e8c662057606f530588969fb8e552a3b7f
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Greentime-Hu/Add-SiFive-FU740-PCIe-host-controller-driver-support/20210331-172909
        git checkout c1d210e8c662057606f530588969fb8e552a3b7f
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/clk/sifive/sifive-prci.c: In function 'sifive_prci_pcie_aux_clock_enable':
>> drivers/clk/sifive/sifive-prci.c:475:6: warning: variable 'r' set but not used [-Wunused-but-set-variable]
     475 |  u32 r;
         |      ^
   drivers/clk/sifive/sifive-prci.c: In function 'sifive_prci_pcie_aux_clock_disable':
   drivers/clk/sifive/sifive-prci.c:490:6: warning: variable 'r' set but not used [-Wunused-but-set-variable]
     490 |  u32 r;
         |      ^


vim +/r +475 drivers/clk/sifive/sifive-prci.c

   470	
   471	int sifive_prci_pcie_aux_clock_enable(struct clk_hw *hw)
   472	{
   473		struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
   474		struct __prci_data *pd = pc->pd;
 > 475		u32 r;
   476	
   477		if (sifive_prci_pcie_aux_clock_is_enabled(hw))
   478			return 0;
   479	
   480		__prci_writel(1, PRCI_PCIE_AUX_OFFSET, pd);
   481		r = __prci_readl(pd, PRCI_PCIE_AUX_OFFSET);	/* barrier */
   482	
   483		return 0;
   484	}
   485	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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