From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org, Tariq Toukan <tariqt@nvidia.com>,
Aya Levin <ayal@nvidia.com>, Moshe Shemesh <moshe@nvidia.com>,
Saeed Mahameed <saeedm@nvidia.com>
Subject: [net 4/5] net/mlx5: Fix PBMC register mapping
Date: Tue, 6 Apr 2021 21:06:19 -0700 [thread overview]
Message-ID: <20210407040620.96841-5-saeed@kernel.org> (raw)
In-Reply-To: <20210407040620.96841-1-saeed@kernel.org>
From: Aya Levin <ayal@nvidia.com>
Add reserved mapping to cover all the register in order to avoid setting
arbitrary values to newer FW which implements the reserved fields.
Fixes: 50b4a3c23646 ("net/mlx5: PPTB and PBMC register firmware command support")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
include/linux/mlx5/mlx5_ifc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 9940070cda8f..9c68b2da14c6 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -10200,7 +10200,7 @@ struct mlx5_ifc_pbmc_reg_bits {
struct mlx5_ifc_bufferx_reg_bits buffer[10];
- u8 reserved_at_2e0[0x40];
+ u8 reserved_at_2e0[0x80];
};
struct mlx5_ifc_qtct_reg_bits {
--
2.30.2
next prev parent reply other threads:[~2021-04-07 4:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-07 4:06 [pull request][net 0/5] mlx5 fixes 2021-04-06 Saeed Mahameed
2021-04-07 4:06 ` [net 1/5] net/mlx5: Fix HW spec violation configuring uplink Saeed Mahameed
2021-04-07 22:00 ` patchwork-bot+netdevbpf
2021-04-07 4:06 ` [net 2/5] net/mlx5: Fix placement of log_max_flow_counter Saeed Mahameed
2021-04-07 4:06 ` [net 3/5] net/mlx5: Fix PPLM register mapping Saeed Mahameed
2021-04-07 4:06 ` Saeed Mahameed [this message]
2021-04-07 4:06 ` [net 5/5] net/mlx5: fix kfree mismatch in indir_table.c Saeed Mahameed
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