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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH v6 15/15] of: Add plumbing for restricted DMA pool
Date: Mon, 10 May 2021 21:41:19 +0800	[thread overview]
Message-ID: <202105102115.T5VSCweo-lkp@intel.com> (raw)
In-Reply-To: <20210510095026.3477496-16-tientzu@chromium.org>

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Hi Claire,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on xen-tip/linux-next]
[also build test ERROR on linus/master v5.13-rc1 next-20210510]
[cannot apply to swiotlb/linux-next robh/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Claire-Chang/Restricted-DMA/20210510-175327
base:   https://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git linux-next
config: um-randconfig-r005-20210510 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/b3ac99e512425b0aabc1cfeb9a4e993d2002c577
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Claire-Chang/Restricted-DMA/20210510-175327
        git checkout b3ac99e512425b0aabc1cfeb9a4e993d2002c577
        # save the attached .config to linux build tree
        make W=1 W=1 ARCH=um 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All error/warnings (new ones prefixed by >>):

   drivers/of/device.c: In function 'of_dma_configure_id':
>> drivers/of/device.c:169:10: error: implicit declaration of function 'of_dma_set_restricted_buffer'; did you mean 'of_dma_get_restricted_buffer'? [-Werror=implicit-function-declaration]
     169 |   return of_dma_set_restricted_buffer(dev);
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
         |          of_dma_get_restricted_buffer
   cc1: some warnings being treated as errors
--
>> drivers/of/address.c:1116:5: warning: no previous prototype for 'of_dma_set_restricted_buffer' [-Wmissing-prototypes]
    1116 | int of_dma_set_restricted_buffer(struct device *dev)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

Kconfig warnings: (for reference only)
   WARNING: unmet direct dependencies detected for LOCKDEP
   Depends on DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT && (FRAME_POINTER || MIPS || PPC || S390 || MICROBLAZE || ARM || ARC || X86)
   Selected by
   - LOCK_STAT && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT
   - DEBUG_LOCK_ALLOC && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT


vim +169 drivers/of/device.c

    54	
    55	/**
    56	 * of_dma_configure_id - Setup DMA configuration
    57	 * @dev:	Device to apply DMA configuration
    58	 * @np:		Pointer to OF node having DMA configuration
    59	 * @force_dma:  Whether device is to be set up by of_dma_configure() even if
    60	 *		DMA capability is not explicitly described by firmware.
    61	 * @id:		Optional const pointer value input id
    62	 *
    63	 * Try to get devices's DMA configuration from DT and update it
    64	 * accordingly.
    65	 *
    66	 * If platform code needs to use its own special DMA configuration, it
    67	 * can use a platform bus notifier and handle BUS_NOTIFY_ADD_DEVICE events
    68	 * to fix up DMA configuration.
    69	 */
    70	int of_dma_configure_id(struct device *dev, struct device_node *np,
    71				bool force_dma, const u32 *id)
    72	{
    73		const struct iommu_ops *iommu;
    74		const struct bus_dma_region *map = NULL;
    75		u64 dma_start = 0;
    76		u64 mask, end, size = 0;
    77		bool coherent;
    78		int ret;
    79	
    80		ret = of_dma_get_range(np, &map);
    81		if (ret < 0) {
    82			/*
    83			 * For legacy reasons, we have to assume some devices need
    84			 * DMA configuration regardless of whether "dma-ranges" is
    85			 * correctly specified or not.
    86			 */
    87			if (!force_dma)
    88				return ret == -ENODEV ? 0 : ret;
    89		} else {
    90			const struct bus_dma_region *r = map;
    91			u64 dma_end = 0;
    92	
    93			/* Determine the overall bounds of all DMA regions */
    94			for (dma_start = ~0; r->size; r++) {
    95				/* Take lower and upper limits */
    96				if (r->dma_start < dma_start)
    97					dma_start = r->dma_start;
    98				if (r->dma_start + r->size > dma_end)
    99					dma_end = r->dma_start + r->size;
   100			}
   101			size = dma_end - dma_start;
   102	
   103			/*
   104			 * Add a work around to treat the size as mask + 1 in case
   105			 * it is defined in DT as a mask.
   106			 */
   107			if (size & 1) {
   108				dev_warn(dev, "Invalid size 0x%llx for dma-range(s)\n",
   109					 size);
   110				size = size + 1;
   111			}
   112	
   113			if (!size) {
   114				dev_err(dev, "Adjusted size 0x%llx invalid\n", size);
   115				kfree(map);
   116				return -EINVAL;
   117			}
   118		}
   119	
   120		/*
   121		 * If @dev is expected to be DMA-capable then the bus code that created
   122		 * it should have initialised its dma_mask pointer by this point. For
   123		 * now, we'll continue the legacy behaviour of coercing it to the
   124		 * coherent mask if not, but we'll no longer do so quietly.
   125		 */
   126		if (!dev->dma_mask) {
   127			dev_warn(dev, "DMA mask not set\n");
   128			dev->dma_mask = &dev->coherent_dma_mask;
   129		}
   130	
   131		if (!size && dev->coherent_dma_mask)
   132			size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1);
   133		else if (!size)
   134			size = 1ULL << 32;
   135	
   136		/*
   137		 * Limit coherent and dma mask based on size and default mask
   138		 * set by the driver.
   139		 */
   140		end = dma_start + size - 1;
   141		mask = DMA_BIT_MASK(ilog2(end) + 1);
   142		dev->coherent_dma_mask &= mask;
   143		*dev->dma_mask &= mask;
   144		/* ...but only set bus limit and range map if we found valid dma-ranges earlier */
   145		if (!ret) {
   146			dev->bus_dma_limit = end;
   147			dev->dma_range_map = map;
   148		}
   149	
   150		coherent = of_dma_is_coherent(np);
   151		dev_dbg(dev, "device is%sdma coherent\n",
   152			coherent ? " " : " not ");
   153	
   154		iommu = of_iommu_configure(dev, np, id);
   155		if (PTR_ERR(iommu) == -EPROBE_DEFER) {
   156			/* Don't touch range map if it wasn't set from a valid dma-ranges */
   157			if (!ret)
   158				dev->dma_range_map = NULL;
   159			kfree(map);
   160			return -EPROBE_DEFER;
   161		}
   162	
   163		dev_dbg(dev, "device is%sbehind an iommu\n",
   164			iommu ? " " : " not ");
   165	
   166		arch_setup_dma_ops(dev, dma_start, size, iommu, coherent);
   167	
   168		if (!iommu)
 > 169			return of_dma_set_restricted_buffer(dev);
   170	
   171		return 0;
   172	}
   173	EXPORT_SYMBOL_GPL(of_dma_configure_id);
   174	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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  reply	other threads:[~2021-05-10 13:41 UTC|newest]

Thread overview: 147+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-10  9:50 [Intel-gfx] [PATCH v6 00/15] Restricted DMA Claire Chang
2021-05-10  9:50 ` Claire Chang
2021-05-10  9:50 ` Claire Chang
2021-05-10  9:50 ` [Nouveau] " Claire Chang
2021-05-10  9:50 ` Claire Chang
2021-05-10  9:50 ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 01/15] swiotlb: Refactor swiotlb init functions Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 14:58   ` [Intel-gfx] " Christoph Hellwig
2021-05-10 14:58     ` Christoph Hellwig
2021-05-10 14:58     ` [Nouveau] " Christoph Hellwig
2021-05-10 14:58     ` Christoph Hellwig
2021-05-10 14:58     ` Christoph Hellwig
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 02/15] swiotlb: Refactor swiotlb_create_debugfs Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 14:59   ` [Intel-gfx] " Christoph Hellwig
2021-05-10 14:59     ` Christoph Hellwig
2021-05-10 14:59     ` [Nouveau] " Christoph Hellwig
2021-05-10 14:59     ` Christoph Hellwig
2021-05-10 14:59     ` Christoph Hellwig
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 03/15] swiotlb: Add DMA_RESTRICTED_POOL Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 04/15] swiotlb: Add restricted DMA pool initialization Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 15:02   ` [Intel-gfx] " Christoph Hellwig
2021-05-10 15:02     ` Christoph Hellwig
2021-05-10 15:02     ` [Nouveau] " Christoph Hellwig
2021-05-10 15:02     ` Christoph Hellwig
2021-05-10 15:02     ` Christoph Hellwig
2021-05-11 16:42     ` [Intel-gfx] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` [Nouveau] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 05/15] swiotlb: Add a new get_io_tlb_mem getter Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 15:03   ` [Intel-gfx] " Christoph Hellwig
2021-05-10 15:03     ` Christoph Hellwig
2021-05-10 15:03     ` [Nouveau] " Christoph Hellwig
2021-05-10 15:03     ` Christoph Hellwig
2021-05-10 15:03     ` Christoph Hellwig
2021-05-11 16:42     ` [Intel-gfx] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` [Nouveau] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 06/15] swiotlb: Update is_swiotlb_buffer to add a struct device argument Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 07/15] swiotlb: Update is_swiotlb_active " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 08/15] swiotlb: Bounce data from/to restricted DMA pool if available Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 15:05   ` [Intel-gfx] " Christoph Hellwig
2021-05-10 15:05     ` Christoph Hellwig
2021-05-10 15:05     ` [Nouveau] " Christoph Hellwig
2021-05-10 15:05     ` Christoph Hellwig
2021-05-10 15:05     ` Christoph Hellwig
2021-05-11 16:42     ` [Intel-gfx] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` [Nouveau] " Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-11 16:42       ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 09/15] swiotlb: Move alloc_size to find_slots Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 10/15] swiotlb: Refactor swiotlb_tbl_unmap_single Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 11/15] dma-direct: Add a new wrapper __dma_direct_free_pages() Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 12/15] swiotlb: Add restricted DMA alloc/free support Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 13/15] dma-direct: Allocate memory from restricted DMA pool if available Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 14/15] dt-bindings: of: Add restricted DMA pool Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50 ` [Intel-gfx] [PATCH v6 15/15] of: Add plumbing for " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` [Nouveau] " Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10  9:50   ` Claire Chang
2021-05-10 13:41   ` kernel test robot [this message]
2021-05-10 10:32 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev2) Patchwork
2021-05-18  6:54 ` [Intel-gfx] [PATCH v6 00/15] Restricted DMA Claire Chang
2021-05-18  6:54   ` Claire Chang
2021-05-18  6:54   ` Claire Chang
2021-05-18  6:54   ` [Nouveau] " Claire Chang
2021-05-18  6:54   ` Claire Chang
2021-05-18  6:54   ` Claire Chang

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