From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors
Date: Wed, 12 May 2021 17:16:59 +0100 [thread overview]
Message-ID: <20210512161657.GA12391@arm.com> (raw)
In-Reply-To: <20210511160446.42871-1-broonie@kernel.org>
On Tue, May 11, 2021 at 05:04:43PM +0100, Mark Brown wrote:
> This series is a combination of factoring out some duplicated code and a
> very minor optimisation to the performance of handling converting FPSIMD
> state to SVE in the live registers for 128 bit SVE vectors.
>
> v2:
> - Combine P and FFR flushing into a single macro.
>
> Mark Brown (3):
> arm64/sve: Split _sve_flush macro into separate Z and predicate
> flushes
> arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
> arm64/sve: Skip flushing Z registers with 128 bit vectors
The series makes sense to me:
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
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prev parent reply other threads:[~2021-05-12 16:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-11 16:04 [PATCH v2 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors Mark Brown
2021-05-11 16:04 ` [PATCH v2 1/3] arm64/sve: Split _sve_flush macro into separate Z and predicate flushes Mark Brown
2021-05-12 13:40 ` Dave Martin
2021-05-11 16:04 ` [PATCH v2 2/3] arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state() Mark Brown
2021-05-12 13:40 ` Dave Martin
2021-05-11 16:04 ` [PATCH v2 3/3] arm64/sve: Skip flushing Z registers with 128 bit vectors Mark Brown
2021-05-12 13:49 ` Dave Martin
2021-05-12 14:22 ` Mark Brown
2021-05-12 16:16 ` Catalin Marinas [this message]
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