From: Catalin Marinas <catalin.marinas@arm.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Ard Biesheuvel <ardb@kernel.org>,
Vincent Whitchurch <vincent.whitchurch@axis.com>,
Will Deacon <will@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
kernel@axis.com
Subject: Re: [PATCH] arm64: Make ARCH_DMA_MINALIGN configurable
Date: Mon, 17 May 2021 15:20:25 +0100 [thread overview]
Message-ID: <20210517142025.GD1106@arm.com> (raw)
In-Reply-To: <CAK8P3a17UyHiNoHKu4d_Uyi+jmbpprN+vNkqb53MMHbJTO2htw@mail.gmail.com>
On Mon, May 17, 2021 at 03:35:39PM +0200, Arnd Bergmann wrote:
> On Mon, May 17, 2021 at 2:01 PM Ard Biesheuvel <ardb@kernel.org> wrote:
> > On Mon, 17 May 2021 at 13:06, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > > On Mon, May 17, 2021 at 09:43:32AM +0200, Vincent Whitchurch wrote:
> > >
> > > Another option I recall discussing with Arnd about two years ago was to
> > > start with the default 128 at boot but add the smaller slab caches
> > > later, once we have more information. This can be just another 64 byte
> > > cache or even go all the way down to 8 byte if all the devices are
> > > cache coherent.
> > >
> >
> > ARCH_SLAB_MINALIGN is also used to statically align (members of)
> > struct types, so doing this at runtime is going to have limited
> > effect.
> >
> > If a) ThunderX is the only platform we care about (do we?) that has
> > 128 byte cachelines, and b) DMA is cache coherent on such platforms,
> > couldn't we separate ARCH_SLAB_MINALIGN from ARCH_DMA_MINALIGN? I.e.,
> > set the first to 64 and keep the second at 128?
>
> What is the purpose of ARCH_DMA_MINALIGN then? If it's cache
> coherent, does DMA buffer still need to be aligned to the cache line
> size?
For coherent DMA, we don't need the alignment from a correctness
perspective.
For performance, a driver can always pass SLAB_HWCACHE_ALIGN which ends
up using cache_line_size(), so it gets the actual hardware value.
--
Catalin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-05-17 14:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-17 7:43 [PATCH] arm64: Make ARCH_DMA_MINALIGN configurable Vincent Whitchurch
2021-05-17 11:04 ` Catalin Marinas
2021-05-17 12:01 ` Ard Biesheuvel
2021-05-17 13:35 ` Arnd Bergmann
2021-05-17 14:20 ` Catalin Marinas [this message]
2021-05-17 14:15 ` Catalin Marinas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210517142025.GD1106@arm.com \
--to=catalin.marinas@arm.com \
--cc=ardb@kernel.org \
--cc=arnd@arndb.de \
--cc=kernel@axis.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=vincent.whitchurch@axis.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.