From: Lukasz Majewski <lukma@denx.de>
To: Ramon Fried <rfried.dev@gmail.com>,
U-Boot Mailing List <u-boot@lists.denx.de>,
Joe Hershberger <joe.hershberger@ni.com>,
Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Subject: Re: [PATCH v1 1/6] net: mv88e61xx: Add support for checking addressing mode
Date: Fri, 28 May 2021 13:49:37 +0200 [thread overview]
Message-ID: <20210528134937.50ce7fb7@ktm> (raw)
In-Reply-To: <CAGi-RU+pJC3_eNxaeg1P9g15wCgVQCLQRaGQeonsdNHJA14sJA@mail.gmail.com>
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Hi Joe, Tom,
> On Wed, Mar 17, 2021 at 4:14 PM Lukasz Majewski <lukma@denx.de> wrote:
> >
> > Some Marvell switch devices are dual chip ones, like mv88e6020,
> > which use direct MDIO addressing to access its ports' registers.
> > Such approach allows connecting two such devices in a single MDIO
> > bus with simple addressing scheme.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > ---
> >
> > drivers/net/phy/mv88e61xx.c | 42
> > +++++++++++++++++++++++++++++++++++++ 1 file changed, 42
> > insertions(+)
> >
> > diff --git a/drivers/net/phy/mv88e61xx.c
> > b/drivers/net/phy/mv88e61xx.c index 7eff37b24499..69a1dd8f1859
> > 100644 --- a/drivers/net/phy/mv88e61xx.c
> > +++ b/drivers/net/phy/mv88e61xx.c
> > @@ -202,6 +202,7 @@ struct mv88e61xx_phy_priv {
> > u8 phy_ctrl1_en_det_shift; /* 'EDet' bit field offset */
> > u8 phy_ctrl1_en_det_width; /* Width of 'EDet' bit field */
> > u8 phy_ctrl1_en_det_ctrl; /* 'EDet' control value */
> > + u8 direct_access; /* Access switch device directly
> > */ };
> >
> > static inline int smi_cmd(int cmd, int addr, int reg)
> > @@ -928,6 +929,40 @@ static int
> > mv88e61xx_priv_reg_offs_pre_init(struct phy_device *phydev) return
> > -ENODEV; }
> >
> > +static int mv88e61xx_check_addressing(struct phy_device *phydev)
> > +{
> > + if (!CONFIG_IS_ENABLED(OF_CONTROL))
> > + return 0;
> > +
> > + /*
> > + * Some devices - like mv88e6020 are dual chip - i.e. two
> > + * such devices can be directly accessed via SMI bus.
> > + * The addressing depends on R0_LED/ADDR4 pin value duing
> > + * bootstrap.
> > + *
> > + * This means that there is no need for indirect access.
> > + */
> > + struct mv88e61xx_phy_priv *priv = phydev->priv;
> > +
> > + /*
> > + * As this function is called very early and hence the
> > phydev
> > + * is not yet initialized we use aliast and DTS to asses if
> > + * device shall be directly accessed or not.
> > + */
> > + ofnode sw0;
> > + int ret;
> > +
> > + sw0 = ofnode_get_aliases_node("switch0");
> > + if (!ofnode_valid(sw0))
> > + return -ENODEV;
> > +
> > + ret = ofnode_device_is_compatible(sw0, "marvell,mv88e6020");
> > + if (ret)
> > + priv->direct_access = 1;
> > +
> > + return 0;
> > +}
> > +
> > static int mv88e61xx_probe(struct phy_device *phydev)
> > {
> > struct mii_dev *smi_wrapper;
> > @@ -982,6 +1017,8 @@ static int mv88e61xx_probe(struct phy_device
> > *phydev)
> >
> > phydev->priv = priv;
> >
> > + mv88e61xx_check_addressing(phydev);
> > +
> > res = mv88e61xx_priv_reg_offs_pre_init(phydev);
> > if (res < 0)
> > return res;
> > @@ -1197,6 +1234,11 @@ int get_phy_id(struct mii_dev *bus, int
> > smi_addr, int devad, u32 *phy_id) temp_phy.priv = &temp_priv;
> > temp_mii.priv = &temp_phy;
> >
> > + mv88e61xx_check_addressing(&temp_phy);
> > + /* For direct access the phy address equals to smi_addr */
> > + if (temp_priv.direct_access)
> > + temp_phy.addr = smi_addr;
> > +
> > /*
> > * get_phy_id() can be called by framework before mv88e61xx
> > driver
> > * probing, in this case the global register offsets are not
> > --
> > 2.20.1
> >
>
> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Could this patch series be pulled to u-boot-net tree (or directly to
-master branch) ?
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
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next prev parent reply other threads:[~2021-05-28 11:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-17 14:14 [PATCH v1 0/6] Provide support for mv88e6020 Marvell switch Lukasz Majewski
2021-03-17 14:14 ` [PATCH v1 1/6] net: mv88e61xx: Add support for checking addressing mode Lukasz Majewski
2021-05-08 6:25 ` Ramon Fried
2021-05-28 11:49 ` Lukasz Majewski [this message]
2021-03-17 14:14 ` [PATCH v1 2/6] net: mv88e61xx: Configure PHY ports to also pass packets between them Lukasz Majewski
2021-05-08 6:25 ` Ramon Fried
2021-03-17 14:14 ` [PATCH v1 3/6] net: mv88e61xx: Clear temporary structs before using them in get_phy_id() Lukasz Majewski
2021-05-08 6:25 ` Ramon Fried
2021-03-17 14:14 ` [PATCH v1 4/6] net: mv88e61xx: Directly access the switch chip Lukasz Majewski
2021-05-08 6:25 ` Ramon Fried
2021-03-17 14:14 ` [PATCH v1 5/6] net: mv88e61xx: Set proper offset when R0_LED/ADDR4 is set on bootstrap Lukasz Majewski
2021-05-08 6:26 ` Ramon Fried
2021-03-17 14:14 ` [PATCH v1 6/6] net: mv88e61xx: Reset switch PHYs when bootstrapped to !NO_CPU Lukasz Majewski
2021-05-08 6:26 ` Ramon Fried
-- strict thread matches above, loose matches on Subject: below --
2023-06-01 9:59 [PATCH v1 0/6] Provide support for mv88e6020 Marvell switch Lukasz Majewski
2023-06-01 10:00 ` [PATCH v1 1/6] net: mv88e61xx: Add support for checking addressing mode Lukasz Majewski
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