From: "Daniel P. Berrangé" <berrange@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Daniel P. Berrangé" <berrange@redhat.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cleber Rosa" <crosa@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v3 4/4] NOT FOR MERGE target/i386: use x86-64-abi1 CPU model as default on x86_64
Date: Mon, 7 Jun 2021 14:58:43 +0100 [thread overview]
Message-ID: <20210607135843.196595-5-berrange@redhat.com> (raw)
In-Reply-To: <20210607135843.196595-1-berrange@redhat.com>
The only differences between x86-64-abi1 and qemu64 is that the former
does not have the 'vme' or 'svm' flags.
In practice I don't think we should make this change, because it doesn't
especially add any value as-is. The only possible case is around 'svm'
because KVM already masks that feature, but TCG allows it. Thus using
x86-64-abi1 would mean that KVM and TCG expose a more consistent feature
set.
Also note that while libvirt can cope with default CPUs changing now,
it can't with the default CPU being a model name that it does not
already know about.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
hw/i386/pc_piix.c | 3 +++
hw/i386/pc_q35.c | 3 +++
target/i386/cpu.h | 2 +-
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 30b8bd6ea9..8f23bad647 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -444,6 +444,9 @@ static void pc_i440fx_5_2_machine_options(MachineClass *m)
m->is_default = false;
compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
+#ifdef TARGET_X86_64
+ m->default_cpu_type = X86_CPU_TYPE_NAME("qemu64");
+#endif
}
DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 46a0f196f4..a684c1db3b 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -372,6 +372,9 @@ static void pc_q35_5_2_machine_options(MachineClass *m)
m->alias = NULL;
compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
+#ifdef TARGET_X86_64
+ m->default_cpu_type = X86_CPU_TYPE_NAME("qemu64");
+#endif
}
DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ac3abea97c..9b895a63c7 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1999,7 +1999,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define CPU_RESOLVING_TYPE TYPE_X86_CPU
#ifdef TARGET_X86_64
-#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu64")
+#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("x86-64-abi1")
#else
#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu32")
#endif
--
2.31.1
next prev parent reply other threads:[~2021-06-07 14:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 13:58 [PATCH v3 0/4] target/i386/cpu: introduce new CPU models for x86-64 ABI levels Daniel P. Berrangé
2021-06-07 13:58 ` [PATCH v3 1/4] docs: add a table showing x86-64 ABI compatibility levels Daniel P. Berrangé
2021-06-07 20:05 ` Eduardo Habkost
2021-06-07 13:58 ` [PATCH v3 2/4] target/i386: define CPU models to model x86-64 ABI levels Daniel P. Berrangé
2021-06-07 13:58 ` [PATCH v3 3/4] scripts: helper to generate x86_64 CPU ABI compat info Daniel P. Berrangé
2021-06-07 17:11 ` Eduardo Habkost
2021-06-07 20:07 ` Eduardo Habkost
2021-06-09 17:25 ` Daniel P. Berrangé
2021-06-07 13:58 ` Daniel P. Berrangé [this message]
2021-06-07 21:33 ` [PATCH v3 0/4] target/i386/cpu: introduce new CPU models for x86-64 ABI levels Eduardo Habkost
2021-06-08 17:49 ` Daniel P. Berrangé
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